We demonstrate a low-loss and broad-bandwidth fiber-to-waveguide converter with a 3-D functional SiO ₂ taper for silicon photonics. The converter is composed of a cantilevered SiO ₂ waveguide and Si nano-tapers. In order to reduce the loss from the cleaved fiber, a 3-D functional SiO ₂ taper is designed to compress the size of optical mode field. Using cleaved optical fibers with a mode field diameter of 10.5 μm at 1550 nm, we characterized the optical performances of the converter. With an index-matching liquid, the lowest coupling loss of TE mode is 1.5 dB/facet and the lowest coupling loss of TM mode is 2.1 dB/facet. For both TE and TM modes, the 1-dB bandwidth is more than 100 nm, and the alignment tolerances for 1-dB excess loss are, respectively, ±2.5 and ±2 μm in horizontal and vertical directions.

A 1$\times$4 loop-mirror-integrated folded silicon-photonics arrayed waveguide grating (AWG) is designed and fabricated on a SOI wafer with two kinds of thickness of silicon areas. The introducing of two silicon thicknesses benefits the design of de/multiplexing devices with an optimal performance and large fabrication tolerances. Transition structures are used to connect 220nm-thick sections with 340nm-thick areas. The folded AWG consists of a half normal AWG structure, transition structures array and loop-mirror reflector array. Each loop-mirror reflector is composed of a 1$\times$2 multimode interferometers (MMI) splitter/combiner and a bend nanowire silicon waveguide, which is designed on a 220nm-thick silicon region. The half AWG structure with arrayed waveguides is designed on the 340nm-thick section. The measured on-chip loss and crosstalk are ~ -3.5 dB and ~ -20 dB, respectively. This integration of devices on a SOI wafer with different thickness of silicon sections is a potential scheme to integrate silicon-based passive and active devices with the best performances of each device.

In this paper, a novel, to the best of our knowledge, polarization beam splitter (PBS) based on an asymmetrical directional coupler (DC) was proposed, which consists of a strip waveguide (WG) and a ${{\rm Si}_3}{{\rm N}_4}$ loaded horizontal slot WG. By carefully adjusting the geometric parameters of the DC, the phase match condition between these two WGs can be satisfied for the transverse magnetic (TM) polarization, while the coupling efficiency of the transverse electric (TE) polarization is frustrated due to the large phase mismatch. The extra optimizing designs include adding filters to the output ports as well as introducing the tapered structure into the DC, which is settled by the particle swarm optimizing (PSO) algorithm so that the performance of the proposed PBS is improved over a broadband range. Numerical simulations show that the bandwidths for the extinction ratio (ER) $ \gt {20}\;{\rm dB}$, 30 dB, and 40 dB are 160 nm, 95 nm, and 50 nm, respectively, with insertion loss (IL) $ \lt {1}\;{\rm dB}$ for the wavelength of 1.49–1.58 µm. The analysis of the deviations demonstrates that the proposed PBS allows high fabrication tolerances.

A low-crosstalk compact arrayed waveguide grating integrated with a tunable micro-ring resonator is demonstrated on silicon-on-insulator platform, The side-lobe of the silicon nanowire AWG, introduced by fabrication errors, can be effectively suppressed by the Ring Filter, The crosstalk level of the side-lobe can be reduced from -16.3 dB to -26.8dB, in addition, the crosstalk of integrate AWG have improved over the entire 3 dB bandwidth, with a maximum crosstalk improvement of 8.9 dB at the left and right wavelengths of the 3 dB bandwidth, and the excess loss from the ring resonator can be ignorable in principle.

The silicon-based arrayed waveguide grating (AWG) is widely used due to its compact footprint and its compatibility with the mature CMOS process. However, except for AWGs with ridged waveguides of a few micrometers of cross section, any small process error will cause a large phase deviation in other AWGs, resulting in an increasing cross talk. In this paper, an ultralow cross talk AWG via a tunable microring resonator (MRR) filter is demonstrated on the SOI platform. The measured insertion loss and minimum adjacent cross talk of the designed AWG are approximately 3.2 and -45.1 dB, respectively. Compared with conventional AWG, its cross talk is greatly reduced.