Transformerless grid-connected inverters have attained a lot of research interest in renewable energy interface applications, due to certain promising properties like greater efficiency, light weight, affordable price, and tolerable power density. Among various types of transformerless grid-tied photovoltaic (PV) inverters, multilevel inverters (MLIs) are mostly popular due to their ability to transmit reactive power, small filter size for reducing total harmonic distortion (THD) and their common-ground (CG) configuration to mitigate the detrimental leakage current due the parasitic capacitances of the PV array. Again, among different types of MLIs for PV systems, switched-capacitor (SC) based multilevel inverter topologies are the burning topic in current decades due to their single source requirements for producing multilevel output voltage. However, for mostly used single-phase five-level inverters, most of the existing SC based topology requires at least two SCs for power conversion. In this paper, a five-level transformerless inverter based on a single SC is proposed, requiring only seven switches, no diode, a single capacitor, and one dc voltage source. The proposed transformerless MLI also has auto-boosting capability. Notably, the number of power switches operating at high frequency is limited to three, which lowers down the switching losses of the inverter. Rather than a new single SC based five-level transformerless inverter topology, a control scheme is also presented to inject a precisely regulated current into the grid that can govern both the active and reactive power support modes. In-depth comparisons between the proposed and cutting-edge MLIs are also provided. All these claims are validated through MATLAB/Simulink and PLECS computer simulation environments. A laboratory-scaled prototype is also built and tested to support the simulated claims further and validate the effectiveness and feasibility of the proposed five-level transformerless inverter topology.

The integration of solar photovoltaic (PV) arrays with induction motor drives (IMDs) has attained significant research interest, owing to the wide range of applications of IMD, such as water pumping, cement industries, electric vehicles, and rolling mills. Multilevel inverters (MLIs) are a prominent solution for driving medium voltage induction motors (IMs) due to their superior performances over two-level voltage source inverters (VSIs). However, the power quality performance of MLI fed IMDs greatly depends on the pulse width modulation (PWM) strategy employed. Traditional PWM strategies for MLIs suffer from power quality problem such as lower order harmonics, high THD, unbalanced power loss distribution, high switching power loss, thermal instability, and electromagnetic interference (EMI) problems. In this paper, a modified PWM strategy is proposed for a solar PV fed 3-level neutral point clamped (NPC) inverter driven IMD. The proposed PWM strategy introduces a new modulating signal with level shifted triangular carriers that is formed by utilizing a 13 ^th harmonic signal and saturated balanced 3-phase sinusoidal signals. The proposed PWM technique is named as 13th harmonic injected 60°-PWM (THISDPWM). The THISDPWM reduces the lower order harmonics contents, overall THD, and switching power losses of the NPC inverter compared to different existing PWM strategies. Apart from that, a robust artificial neutral network (ANN) based incremental conductance maximum power point tracking (MPPT) algorithm is also introduced to control the dc-link voltage of the PV fed NPC inverter driven IMD system. The presented ANN based dc-link control technique ensures stable dc-link voltage against wide range of PV parameters variation. Simulation works are carried out in MATLAB/Simulink environment and a reduced scale laboratory prototype of the IMD is built and tested to validate the performance of the proposed THISDPWM technique.

Due to the rapid advancement of power semiconductor devices, the use of voltage source inverters (VSIs) has gained widespread acceptance. As a consequence, the performance of the voltage source inverter has emerged as a critical aspect that is highly reliant on the modulation strategy. The pulse width modulation (PWM) technique is the most widely utilized method of controlling power semiconductor switches of VSI. Power quality is always considered as an industrial concern for VSI-based power system such as grid-connected renewable energy systems and industrial motor drives which largely depends on the PWM technique used for switching. However, the existing PWM schemes for VSIs suffer from high total harmonic distortion (THD) and power loss problems. To mitigate the THD and power loss of VSI, a hybrid PWM technique has been proposed in this paper. The proposed hybrid PWM technique introduces a modified modulating signal along with newly shaped carrier signal. A two-level VSI is used to evaluate the performance of the proposed hybrid PWM technique both for with and without filter conditions against RL load. The proposed hybrid PWM technique offers 0.89% filtered voltage THD and 0.69% filtered current THD which are lower than that of existing PWM techniques. On the contrary, at without filter condition, the proposed hybrid PWM technique shows THDs of 45.77% and 12.50% for inverter output voltage and current, respectively which are also lower than those of existing PWM techniques. Apart from these, the proposed hybrid PWM technique reduces the switching and conduction power losses of the VSI as compared to existing PWM techniques. The simulation works are carried out in MATLAB/Simulink environment and a reduced scale experiment is conducted in laboratory to evaluate the performance of the proposed hybrid PWM technique.

Nowadays, the use of advanced pulse width modulation (PWM) techniques is becoming a research hot topic for improving the performance of multilevel inverter (MLI) based induction motor drives (IMDs). However, existing triangular carrier-based sinusoidal PWM (SPWM), conventional space vector PWM (CSVPWM), and existing bus-clamping PWM (BCPWM) techniques suffer from power quality problems. For further improvement of the performance of existing PWM techniques, an advanced level shifted carrier-based bus-clamping PWM (ALSBCPWM) technique is proposed in this paper for a 54- pulse ac-dc converter fed 7-level cascaded H-bridge (CHB) inverter based IMD. The carrier signal of the ALSBCPWM is formed by center-aligned harmonic injected saturated level shifted sinusoidal carriers. On the contrary, 3 rd harmonic injected 60° bus clamping modulating signals are used along with the new carrier signals to develop the ALSBCPWM technique. The total harmonic distortion (THD) of inverter output voltage or motor voltage, motor current, inverter switching and conductor power losses of the CHB-MLI are all reduced by the presented ALSBCPWM technique. Excellent thermal stability of the insulated gate bipolar transistors (IGBTs) of the CHB-MLI is also achieved with the proposed PWM technique. The performances of the IMD with the proposed ALSBCPWM technique are studied based on the considerations for industry applications, such as power quality, power losses, and thermal stability. The performance of the proposed ALSBCPWM technique is validated through simulations in MATLAB/Simulink environment and testing in a reduced scale laboratory test platform.

Research into solar PV fed grid-tied multilevel inverters (MLIs) has increased in recent years due to their distinct features compared to two-level voltage source inverters (VSIs). However, maintaining the power quality of MLIs is a challenging problem that encompasses the reduction of total harmonic distortion (THD), dc-link voltage imbalance issues, power loss reduction and thermal stress mitigation; which are significantly affected by the applied pulse width modulation (PWM) technique. In order to tackle the above mentioned power quality problems, this work presents a modified hybrid PWM technique which combines a modified modulating signal with a modified carrier signal. The comparison between the proposed and the existing PWM techniques is performed under different conditions and using a wide range of modulation index variations. A grid-tied three-phase three-level T-type neutral point clamped (NPC) inverter is adopted for the power quality assessment. The proposed hybrid PWM offers 25.57% output line voltage THD and 11.8 V peak-to-peak dc-link capacitor voltage difference which are lower than existing PWM techniques. Additionally, by reducing the switching and conduction losses of the power switches, the proposed hybrid PWM technique offers lower thermal stress than existing PWM techniques. The comparison analysis between the existing and the proposed hybrid PWM technique is carried out using MATLAB/Simulink and PLECS simulation environments. The proposed hybrid PWM technique is further validated using a reduced scale prototype developed in our research laboratory.