Transformerless grid-connected inverters have attained a lot of research interest in renewable energy interface applications, due to certain promising properties like greater efficiency, light weight, affordable price, and tolerable power density. Among various types of transformerless grid-tied photovoltaic (PV) inverters, multilevel inverters (MLIs) are mostly popular due to their ability to transmit reactive power, small filter size for reducing total harmonic distortion (THD) and their common-ground (CG) configuration to mitigate the detrimental leakage current due the parasitic capacitances of the PV array. Again, among different types of MLIs for PV systems, switched-capacitor (SC) based multilevel inverter topologies are the burning topic in current decades due to their single source requirements for producing multilevel output voltage. However, for mostly used single-phase five-level inverters, most of the existing SC based topology requires at least two SCs for power conversion. In this paper, a five-level transformerless inverter based on a single SC is proposed, requiring only seven switches, no diode, a single capacitor, and one dc voltage source. The proposed transformerless MLI also has auto-boosting capability. Notably, the number of power switches operating at high frequency is limited to three, which lowers down the switching losses of the inverter. Rather than a new single SC based five-level transformerless inverter topology, a control scheme is also presented to inject a precisely regulated current into the grid that can govern both the active and reactive power support modes. In-depth comparisons between the proposed and cutting-edge MLIs are also provided. All these claims are validated through MATLAB/Simulink and PLECS computer simulation environments. A laboratory-scaled prototype is also built and tested to support the simulated claims further and validate the effectiveness and feasibility of the proposed five-level transformerless inverter topology.

A new three phase multilevel inverter with reduced number of components count is proposed in this paper. This inverter is designed using a single DC source per phase to generate multiple level output voltage which makes it suitable for low and medium voltage applications, including ac-coupled renewables or energy storages. A generalized circuit configuration is shown in this paper following which the number of output voltage level can be increased as per expectation. Although, each element endures the voltage stress equivalent to the input DC voltage, the value of total standing voltage (TSV) is reduced by the utilization of minimized number of components with respect to the number of series connected capacitors. Further, staircase modulation scheme is used to generate the switching signals. Hence, the proposed inverter can be operated at low switching frequency with optimal output current harmonic distortion which decreases switching losses and suppresses power factor falling. In order to validate the theoretical explanations and practical performances of the proposed inverter, the hypothesis is simulated for 9, 13 and 39 output voltage level inverters for three phase with a line voltage total harmonic distortion (THD) of 6.06%, 4.16% and 2.10% respectively in MATLAB/Simulink and a 5-level single phase laboratory prototype is implemented in the laboratory.

The integration of solar photovoltaic (PV) arrays with induction motor drives (IMDs) has attained significant research interest, owing to the wide range of applications of IMD, such as water pumping, cement industries, electric vehicles, and rolling mills. Multilevel inverters (MLIs) are a prominent solution for driving medium voltage induction motors (IMs) due to their superior performances over two-level voltage source inverters (VSIs). However, the power quality performance of MLI fed IMDs greatly depends on the pulse width modulation (PWM) strategy employed. Traditional PWM strategies for MLIs suffer from power quality problem such as lower order harmonics, high THD, unbalanced power loss distribution, high switching power loss, thermal instability, and electromagnetic interference (EMI) problems. In this paper, a modified PWM strategy is proposed for a solar PV fed 3-level neutral point clamped (NPC) inverter driven IMD. The proposed PWM strategy introduces a new modulating signal with level shifted triangular carriers that is formed by utilizing a 13 ^th harmonic signal and saturated balanced 3-phase sinusoidal signals. The proposed PWM technique is named as 13th harmonic injected 60°-PWM (THISDPWM). The THISDPWM reduces the lower order harmonics contents, overall THD, and switching power losses of the NPC inverter compared to different existing PWM strategies. Apart from that, a robust artificial neutral network (ANN) based incremental conductance maximum power point tracking (MPPT) algorithm is also introduced to control the dc-link voltage of the PV fed NPC inverter driven IMD system. The presented ANN based dc-link control technique ensures stable dc-link voltage against wide range of PV parameters variation. Simulation works are carried out in MATLAB/Simulink environment and a reduced scale laboratory prototype of the IMD is built and tested to validate the performance of the proposed THISDPWM technique.

This paper presents a new hybrid three-phase cascaded modular multilevel inverter developed with reduced switch count for harvesting renewable energy. The basic module of the proposed inverter consists of six switches, three asymmetric dc links, and two blocking diodes. The inverter can generate six positive voltage states, which are negatively polarized by the end-side H-bridge unit. As a result, higher number of voltage levels are obtained with minimum number of switches that ensure reduced total harmonic distortion in the grid current. Additionally, the proposed inverter can operate at comparatively lower switching frequency, which decreases the switching loss. Most of the switches in each individual module conduct for a small period resulting in low conduction losses. The reduced switch count with the low switching and conduction losses increases the compactness and the efficiency of the proposed inverter. Multiple high-frequency magnetic links are utilized for the dc sources required for the proposed inverter to achieve inherent dc-link voltage balancing ability and galvanic isolation. The performance of the proposed inverter is validated by simulation and experimental investigations.

The pulse width modulation (PWM) techniques are becoming the game changer for multi-pulse power converter fed multilevel inverter-based induction motor drive (IMD) due to their significant impacts on power quality. In this paper, a new level shifted carrier-based PWM technique is proposed for a 5-level cascaded H-bridge (CHB) multilevel inverter driven by a 36-pulse ac-dc converter based IMD. To meet the power quality demand of IEEE-519 at grid side, a modular transformer is used, and the transformer is coupled to form a 36-pulse ac-dc converter. A 5-level CHB multilevel inverter is utilized on the motor side, which uses the proposed carrier based PWM technique for switching action to ensure superior performance of the IMD. The proposed PWM technique is named as third-harmonic injected inverted sinusoidal carrier PWM (THI2SCPWM), which utilizes 3 ^rd harmonic injection principle with inverted sinusoidal signal to form the proposed carrier signal. The 5-level CHB inverter used in the IMD shows less power loss and total harmonic distortion (THD) with the proposed THI2SCPWM technique. Moreover, the IMD with the THI2SCPWM shows low stator voltage THD, stator current THD, and smooth dynamic response. Apart from these, the THI2SCPWM mitigates the torque ripple of the IMD. The motor drive system with the THI2SCPWM technique is modeled and its performance is simulated on MATLAB/Simulink environment. A scaled down experimental setup is utilized to validate the superiority of the proposed PWM technique.

Due to the rapid advancement of power semiconductor devices, the use of voltage source inverters (VSIs) has gained widespread acceptance. As a consequence, the performance of the voltage source inverter has emerged as a critical aspect that is highly reliant on the modulation strategy. The pulse width modulation (PWM) technique is the most widely utilized method of controlling power semiconductor switches of VSI. Power quality is always considered as an industrial concern for VSI-based power system such as grid-connected renewable energy systems and industrial motor drives which largely depends on the PWM technique used for switching. However, the existing PWM schemes for VSIs suffer from high total harmonic distortion (THD) and power loss problems. To mitigate the THD and power loss of VSI, a hybrid PWM technique has been proposed in this paper. The proposed hybrid PWM technique introduces a modified modulating signal along with newly shaped carrier signal. A two-level VSI is used to evaluate the performance of the proposed hybrid PWM technique both for with and without filter conditions against RL load. The proposed hybrid PWM technique offers 0.89% filtered voltage THD and 0.69% filtered current THD which are lower than that of existing PWM techniques. On the contrary, at without filter condition, the proposed hybrid PWM technique shows THDs of 45.77% and 12.50% for inverter output voltage and current, respectively which are also lower than those of existing PWM techniques. Apart from these, the proposed hybrid PWM technique reduces the switching and conduction power losses of the VSI as compared to existing PWM techniques. The simulation works are carried out in MATLAB/Simulink environment and a reduced scale experiment is conducted in laboratory to evaluate the performance of the proposed hybrid PWM technique.