Avalanche photodiodes, which operate above the breakdown voltage in Geiger mode connected with avalanche-quenching circuits, can be used to detect single photons and are therefore called single-photon avalanche diodes SPAD’s. Circuit configurations suitable for this operation mode are critically analyzed and their relative merits in photon counting and timing applications are assessed. Simple passive-quenching circuits (PQC’s), which are useful for SPAD device testing and selection, have fairly limited application. Suitably designed active-quenching circuits (AQC’s) make it possible to exploit the best performance of SPAD’s. Thick silicon SPAD’s that operate at high voltages (250–450 V) have photon detection efficiency higher than 50% from 540- to 850-nm wavelength and still ~3% at 1064 nm. Thin silicon SPAD’s that operate at low voltages (10–50 V) have 45% efficiency at 500 nm, declining to 10% at 830 nm and to as little as 0.1% at 1064 nm. The time resolution achieved in photon timing is 20 ps FWHM with thin SPAD’s; it ranges from 350 to 150 ps FWHM with thick SPAD’s. The achieved minimum counting dead time and maximum counting rate are 40 ns and 10 Mcps with thick silicon SPAD’s, 10 ns and 40 Mcps with thin SPAD’s. Germanium and III–V compound semiconductor SPAD’s extend the range of photon-counting techniques in the near-infrared region to at least 1600-nm wavelength.

A detailed investigation of electronic switching in chalcogenide-based phase-change memory devices is presented. An original bandgap model consistent with the microscopic structure of both crystalline and amorphous chalcogenide is described, and a physical picture of the switching mechanism is proposed. Numerical simulations provide, for the first time, a quantitative description of the peculiar current-voltage curve of a Ge/sub 2/Sb/sub 2/Te/sub 5/ resistor, in good agreement with measurements performed on test devices.

This paper addresses the numerical modeling of reset programming in NiO-based resistive-switching memory. In our model, we simulate electrical conduction and heating in the conductive filament (CF), which controls the resistance of the low resistive (or set) state, accounting for CF thermal-activated dissolution. Employing CF electrical and thermal parameters, which were previously characterized on our NiO-based samples, our calculations are shown to match experimental reset and retention characteristics. Simulations show that reset transition is self-accelerated as a consequence of a positive feedback between the thermal dissolution of the CF and local Joule heating in the CF bottleneck, which can account for the abrupt resistance transition in experimental data. Finally, the model is used to investigate the reduction of the reset current, which is needed for device application.

A detailed investigation of the time evolution for the low-field resistance R/sub off/ and the threshold voltage V/sub th/ in chalcogenide-based phase-change memory devices is presented. It is observed that both R/sub off/ and V/sub th/ increase and become stable with time and temperature, thus improving the cell readout window. Relying on a microscopic model, the drift of R/sub off/ and V/sub th/ is linked to the dynamic of the intrinsic traps typical of amorphous chalcogenides, thus providing for the first time a unified framework for the comprehension of chalcogenide materials transient behavior.

The physical understanding of the programming and reliability mechanisms in resistive-switching memory devices requires a detailed characterization of the electrical and thermal conduction properties in the low-resistance state of the memory cell. The aim of this paper is the characterization of the conductive filament (CF), which controls the localized current flow in the low resistive state of the cell. Based on a new technique for evaluating the CF temperature during operation, we perform a statistical characterization of the critical filament temperature for the reset operation, i.e., the transition to the high-resistance state by the thermal dissolution of the CF. The thermal resistance of the CF and the activation energy for the dissolution mechanism are then evaluated, allowing for a physics-based numerical modeling of the reset operation based on CF thermal breakup.

Programmable metallization cell (PMC) memory, also known as conductive bridging RAM (CBRAM), is a resistive-switching memory based on non-volatile formation and dissolution of a conductive filament (CF) in a solid electrolyte. Although ease of fabrication, promising performance and multilevel (ML) capability make the PMC a possible candidate for post-flash non-volatile memories, further physical understanding is required to better assess its true potential. In this work, we investigate the kinetics involved in the programming operation (i.e., transition from the high resistance to the low resistance state), which occurs by voltage-driven ion migration and electrochemical deposition, and results in CF formation and growth. The main kinetic parameters controlling the programming operation are extracted from our electrical data. Also, CF growth and corresponding resistance decrease is shown to be controllable with reasonable accuracy in pulse mode by employing a variable load resistance which can dynamically control the programming kinetics. A semi-analytical physical model is shown to account for experimental data and allows for the engineering of fast and reliable ML programming in one transistor-one resistor (1T-1R) devices.