This paper presents a compact-area, low-power, highly digital analog-to-digital converter (ADC) for audio applications. The proposed converter is implemented using only oscillators and digital circuitry, without operational amplifiers nor other highly linear circuits. The ADC consists of two twin secondorder ΣA modulators, which can work both individually or in a pseudodifferential configuration. The proposed system has been implemented in a 0.13-μm standard CMOS technology. The single-ended configuration occupies an active area of 0.02 mm 2 , is powered at 1.8 V with a current consumption of 155 μA, and achieves an A-weighted dynamic range (DR) of 98 dB-A. The pseudodifferential configuration achieves 103 dB-A of A-weighted DR at the expense of doubling the area and power consumption.
6 January 2020 in IEEE Solid-State Circuits Letters
This letter presents a mostly digital VCO-ADC that can directly interface a capacitive MEMS microphone. The ADC is based on two ring oscillators and a coarse-fine counting circuitry. Coarse and fine counters are synchronized using a novel data scrambling technique to mitigate metastability and timing errors. This method enables a very low power consumption in the digital post-processing circuit. The proposed ADC, prototyped in 130 nm CMOS, achieves 73.8 dB-A of SNDR peak and 97 dB of DR in a 20 kHz BW, while consuming 240 μW from the 1.5V/1.2V power supplies. In a reduced power mode (8 kHz BW) with relaxed oscillation parameters, it reaches 66.4 dB-A of SNDR peak and 93 dB of DR with a power consumption of only 77 μW.
This paper analyzes the influence of phase noise and distortion on the performance of oscillator-based sensor data acquisition systems. Circuit noise inherent to the oscillator circuit manifests as phase noise and limits the SNR. Moreover, oscillator nonlinearity generates distortion for large input signals. Phase noise analysis of oscillators is well known in the literature, but the relationship between phase noise and the SNR of an oscillator-based sensor is not straightforward. This paper proposes a model to estimate the influence of phase noise in the performance of an oscillator-based system by reflecting the phase noise to the oscillator input. The proposed model is based on periodic steady-state analysis tools to predict the SNR of the oscillator. The accuracy of this model has been validated by both simulation and experiment in a 130 nm CMOS prototype. We also propose a method to estimate the SNDR and the dynamic range of an oscillator-based readout circuit that improves by more than one order of magnitude the simulation time compared to standard time domain simulations. This speed up enables the optimization and verification of this kind of systems with iterative algorithms.
This paper presents a microphone readout chip incorporating a VCO-based ADC that can be directly connected to a capacitive MEMS sensor without requiring a voltage buffer. The ADC uses an open-loop pseudo differential architecture with two ring oscillators followed by a coarse-fine frequency-to-digital converter. The proposed coarse-fine architecture optimizes power consumption thanks to a new algorithm. The MEMS is connected to the ring oscillators with a source follower circuit that can be programmed to interchange SNR by power consumption in small steps. This feature enables always-on operation in voice recognition applications. The microphone is compatible with standard PDM audio interfaces. Total ADC power consumption ranges between 245μW and 438μW for peak SNDRs between 74dB-A and 80.3dB-A, including the ADC and MEMS coupling circuitry. The Dynamic Range achieves 108dB at full performance with a THD of 1.5% at the Acoustic Overload Point of 128dBSPL. The ADC occupies an area of 0.14mm 2 implemented in 0.13μm CMOS.
13 April 2021 in IEEE Transactions on Circuits and Systems II: Express Briefs
This brief presents an open-loop audio VCO-ADC incorporating a Linear Feedback Shift Register as phase quantizer. The shift register counts the pulses of a current-controlled ring oscillator encoding the count with a maximum length sequence. This counting method improves the power consumption of the digital logic compared to conventional binary or Gray counters. Moreover, the cyclic structure of the maximum length sequence is seized to digitally correct metastability errors produced when sampling the ring oscillator outputs. A prototype chip has been implemented using the proposed architecture in 130nm CMOS occupying 0.01 mm 2 . The ADC can be directly connected to a capacitive MEMS microphone with a power consumption of 227uW and a peak signal-to-noise and distortion ratio of 73dB-A.
Microelectromechanical systems (MEMS) microphone sensors have significantly improved in the past years, while the readout electronic is mainly implemented using switched-capacitor technology. The development of new battery powered “always-on” applications increasingly requires a low power consumption. In this paper, we show a new readout circuit approach which is based on a mostly digital Sigma Delta ( ) analog-to-digital converter (ADC). The operating principle of the readout circuit consists of coupling the MEMS sensor to an impedance converter that modulates the frequency of a stacked-ring oscillator—a new voltage-controlled oscillator (VCO) circuit featuring a good trade-off between phase noise and power consumption. The frequency coded signal is then sampled and converted into a noise-shaped digital sequence by a time-to-digital converter (TDC). A time-efficient design methodology has been used to optimize the sensitivity of the oscillator combined with the phase noise induced by and thermal noise. The circuit has been prototyped in a 130 nm CMOS process and directly bonded to a standard MEMS microphone. The proposed VCO-based analog-to-digital converter (VCO-ADC) has been characterized electrically and acoustically. The peak signal-to-noise and distortion ratio (SNDR) obtained from measurements is 77.9 dB-A and the dynamic range (DR) is 100 dB-A. The current consumption is 750 A at 1.8 V and the effective area is 0.12 mm . This new readout circuit may represent an enabling advance for low-cost digital MEMS microphones.