In this paper, we propose to study voltage controlled oscillators (VCOs) based on the equivalence with pulse frequency modulators (PFMs). This approach is applied to the analysis of VCO-based analog-to-digital converters (VCO-ADCs) and deviates significantly from the conventional interpretation, where VCO-ADCs have been described as the first-order ΔΣ modulators. A first advantage of our approach is that it unveils systematic error components not described by the equivalence with a conventional ΔΣ modulator. A second advantage is that, by a proper selection of the pulses generated by the PFM, we can theoretically construct an open loop VCO-ADC with an arbitrary noise shaping order. Unfortunately, with the exception of the first-order noise shaping case, the required pulse waveforms cannot easily be implemented on the circuit level. However, we describe circuit techniques to achieve a good approximation of the required pulse waveforms, which can easily be implemented by practical circuits. Finally, our approach enables a straightforward description of multistage ΔΣ modulator architectures, which is an alternative and practically feasible way to realize a VCO-ADC with extended noise shaping.

This paper presents a compact-area, low-power, highly digital analog-to-digital converter (ADC) for audio applications. The proposed converter is implemented using only oscillators and digital circuitry, without operational amplifiers nor other highly linear circuits. The ADC consists of two twin secondorder ΣA modulators, which can work both individually or in a pseudodifferential configuration. The proposed system has been implemented in a 0.13-μm standard CMOS technology. The single-ended configuration occupies an active area of 0.02 mm ² , is powered at 1.8 V with a current consumption of 155 μA, and achieves an A-weighted dynamic range (DR) of 98 dB-A. The pseudodifferential configuration achieves 103 dB-A of A-weighted DR at the expense of doubling the area and power consumption.

Due to their label-free and noninvasive nature, impedance measurements have attracted increasing interest in biological research. Advances in microfabrication and integrated-circuit technology have opened a route to using large-scale microelectrode arrays for real-time, high-spatiotemporal-resolution impedance measurements of biological samples. In this review, we discuss different methods and applications of measuring impedance for cell and tissue analysis with a focus on impedance imaging with microelectrode arrays inin vitroapplications. We first introduce how electrode configurations and the frequency range of the impedance analysis determine the information that can be extracted. We then delve into relevant circuit topologies that can be used to implement impedance measurements and their characteristic features, such as resolution and data-acquisition time. Afterwards, we detail design considerations for the implementation of new impedance-imaging devices. We conclude by discussing future fields of application of impedance imaging in biomedical research, in particular applications where optical imaging is not possible, such as monitoring ofex vivotissue slices or microelectrode-based brain implants.

Blood‐brain‐barrier (BBB) disruption has been associated with a variety of central‐nervous‐system diseases. In vitro BBB models enable to investigate how the barrier reacts to external injury events, commonly referred to as insults. Here, a human‐cell‐based BBB platform with integrated, transparent electrodes to monitor barrier tightness in real time at high resolution is presented. The BBB model includes human cerebral endothelial cells and primary pericytes and astrocytes in a 3D arrangement within a pump‐free, open‐microfluidic platform. With this platform, this study demonstrates that oxygen‐glucose deprivation (OGD), which mimics the characteristics of an ischemic insult, induces a rapid remodeling of the cellular actin structures and subsequent morphological changes in the endothelial cells. High‐resolution live imaging shows the formation of large actin stress‐fiber bundles in the endothelial layer during OGD application, which ultimately leads to cell shrinkage and barrier breakage. Simultaneous electrical measurements evidence a rapid decrease of the barrier electrical resistance before the appearance of stress fibers, which indicates that the barrier function is compromised already before the appearance of drastic morphological changes. The results demonstrate that the BBB platform recapitulates the main barrier functions in vitro and can be used to investigate rapid reorganization of the BBB upon application of external stimuli.

A detailed functional characterization of electrogenic cells, such as neurons and cardiomyocytes, by means of high-density microelectrode arrays (HD-MEAs) has emerged as a powerful approach for inferring cellular phenotypes and elucidating fundamental mechanisms underlying cellular function. HD-MEAs have been applied across a range of disciplines, including neurodevelopmental research, stem cell biology, and pharmacology, and more recently in interdisciplinary work at the intersection of biomedical engineering, computer science, and artificial intelligence (AI). Innovations in chip design, fabrication, recording capabilities, and data processing have significantly advanced the functionality of HD-MEAs. Today's chips allow the study of cellular function across scales and at high throughput. They enable the analysis of multi-parametric functional phenotypes over extended time and facilitate monitoring the effects of targeted perturbations on cellular behavior. In this Tutorial Review, we will first survey the advances in HD-MEA design and their readout and stimulation capabilities. We will then abstract studies that used HD-MEAs in combination with other experimental techniques to probe biologically relevant cellular and subcellular features, with an emphasis on in vitro applications of HD-MEAs. Thereafter, we will cover analytical techniques that are essential for analyzing and characterizing HD-MEA data. Finally, we will address current limitations of HD-MEAs and discuss potential future developments.

This letter presents a mostly digital VCO-ADC that can directly interface a capacitive MEMS microphone. The ADC is based on two ring oscillators and a coarse-fine counting circuitry. Coarse and fine counters are synchronized using a novel data scrambling technique to mitigate metastability and timing errors. This method enables a very low power consumption in the digital post-processing circuit. The proposed ADC, prototyped in 130 nm CMOS, achieves 73.8 dB-A of SNDR peak and 97 dB of DR in a 20 kHz BW, while consuming 240 μW from the 1.5V/1.2V power supplies. In a reduced power mode (8 kHz BW) with relaxed oscillation parameters, it reaches 66.4 dB-A of SNDR peak and 93 dB of DR with a power consumption of only 77 μW.