This paper presents a microphone readout chip incorporating a VCO-based ADC that can be directly connected to a capacitive MEMS sensor without requiring a voltage buffer. The ADC uses an open-loop pseudo differential architecture with two ring oscillators followed by a coarse-fine frequency-to-digital converter. The proposed coarse-fine architecture optimizes power consumption thanks to a new algorithm. The MEMS is connected to the ring oscillators with a source follower circuit that can be programmed to interchange SNR by power consumption in small steps. This feature enables always-on operation in voice recognition applications. The microphone is compatible with standard PDM audio interfaces. Total ADC power consumption ranges between 245μW and 438μW for peak SNDRs between 74dB-A and 80.3dB-A, including the ADC and MEMS coupling circuitry. The Dynamic Range achieves 108dB at full performance with a THD of 1.5% at the Acoustic Overload Point of 128dBSPL. The ADC occupies an area of 0.14mm ² implemented in 0.13μm CMOS.

This brief presents an open-loop audio VCO-ADC incorporating a Linear Feedback Shift Register as phase quantizer. The shift register counts the pulses of a current-controlled ring oscillator encoding the count with a maximum length sequence. This counting method improves the power consumption of the digital logic compared to conventional binary or Gray counters. Moreover, the cyclic structure of the maximum length sequence is seized to digitally correct metastability errors produced when sampling the ring oscillator outputs. A prototype chip has been implemented using the proposed architecture in 130nm CMOS occupying 0.01 mm ² . The ADC can be directly connected to a capacitive MEMS microphone with a power consumption of 227uW and a peak signal-to-noise and distortion ratio of 73dB-A.

Microelectromechanical systems (MEMS) microphone sensors have significantly improved in the past years, while the readout electronic is mainly implemented using switched-capacitor technology. The development of new battery powered “always-on” applications increasingly requires a low power consumption. In this paper, we show a new readout circuit approach which is based on a mostly digital Sigma Delta ( $\mathsf{\Sigma }\Delta$ ) analog-to-digital converter (ADC). The operating principle of the readout circuit consists of coupling the MEMS sensor to an impedance converter that modulates the frequency of a stacked-ring oscillator—a new voltage-controlled oscillator (VCO) circuit featuring a good trade-off between phase noise and power consumption. The frequency coded signal is then sampled and converted into a noise-shaped digital sequence by a time-to-digital converter (TDC). A time-efficient design methodology has been used to optimize the sensitivity of the oscillator combined with the phase noise induced by $1/f$ and thermal noise. The circuit has been prototyped in a 130 nm CMOS process and directly bonded to a standard MEMS microphone. The proposed VCO-based analog-to-digital converter (VCO-ADC) has been characterized electrically and acoustically. The peak signal-to-noise and distortion ratio (SNDR) obtained from measurements is 77.9 dB-A and the dynamic range (DR) is 100 dB-A. The current consumption is 750 $\mathsf{\mu }$ A at 1.8 V and the effective area is 0.12 mm ${}^2$ . This new readout circuit may represent an enabling advance for low-cost digital MEMS microphones.

Current trends towards on-edge computing on smart portable devices requires ultra-low power circuits to be able to make feature extraction and classification tasks of patterns. This manuscript proposes a novel approach for feature extraction operations in speech recognition/voice activity detection tasks suitable for portable devices. Whereas conventional approaches are based on either completely analog or digital structures, we propose a “hybrid” approach by means of voltage-controlled-oscillators. Our proposal makes use of a bank a band-pass filters implemented with ring-oscillators to extract the features (energy within different frequency bands) of input audio signals and digitize them. Afterwards, these data will input a digital classification stage such as a neural network. Ring-oscillators are structures with a digital nature, which makes them highly scalable with the possibility of designing them with minimum length devices. Additionally, due to their inherent phase integration, low-frequency band-pass filters can be implemented without large capacitors. Consequently, we strongly benefit from power consumption and area savings. Finally, our proposal may incorporate the analog-to-digital converter into the structure of the own features extractor circuit to make the full conversion of the raw data when triggered. This supposes a unique advantage with respect to other approaches. The architecture is described and proposed at system-level, along with behavioral simulations made to check whether the performance is the expected one or not. Then the structure is designed with a 65-nm CMOS process to estimate the power consumption and area on a silicon implementation. The results show that our solution is very promising in terms of occupied area with a competitive power consumption in comparison to other state-of-the-art solutions.