In this paper, DC, transient, and RF performances among AlGaN/GaN HEMTs with a no field plate structure (basic), a conventional gate field plate structure (GFP), and a double floating field plate structure (2FFP) were studied by utilizing SILVACO ATLAS 2D device technology computer-aided design (TCAD). The peak electric fields under the gate in drain-side can be alleviated effectively in 2FFP devices, compared with basic and GFP devices, which promotes the breakdown voltage (BV) and suppresses the current collapse phenomenon. As a result, the ON-resistance increase caused by the current collapse phenomena is dramatically suppressed in 2FFP ~19.9% compared with GFP ~49.8% when a 1 ms duration pre-stress was applied with V_ds = 300 V in the OFF-state. Because of the discontinuous FP structure, more electric field peaks appear at the edge of the FFP stacks, which leads to a higher BV of ~454.4 V compared to the GFP ~394.3 V and the basic devices ~57.6 V. Moreover, the 2FFP structure performs lower a parasitic capacitance of C_gs = 1.03 pF and C_gd = 0.13 pF than those of the GFP structure (i.e., C_gs = 1.89 pF and C_gd = 0.18 pF). Lower parasitic capacitances lead to a much higher cut-off frequency (f_t) of 46 GHz and a maximum oscillation frequency (f_max) of 130 GHz than those of the GFP structure (i.e., f_t = 27 GHz and f_max = 93 GHz). These results illustrate the superiority of the 2FFP structure for RF GaN HEMT and open up enormous opportunities for integrated RF GaN devices.

This work adopts interface charge engineering to fabricate normally off metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) on an in situ SiNx/AlGaN/GaN platform using an in situ O3 treatment performed in the atomic layer deposition system. The combination of in situ SiNx passivation and an O3-treated Al2O3/AlGaN gate interface allows the device to provide an excellent breakdown voltage of 1498 V at a low specific on-resistance of 2.02 mΩ cm2. The threshold voltage is increased by 2 V by significantly compensating the net polarization charges by more than five times with O3 treatment as well as reducing the interface traps and improving the high-temperature gate stability. Furthermore, a physical model of fixed charges at the Al2O3/AlGaN interface is established based on dielectric thickness-dependent linear fitting and numerical calculations. The matched device performance and simulated energy band bending elucidate the O3-treated fixed-charge modulation mechanism, providing a practical method for producing normally off GaN MIS-HEMTs.

In this work, a dramatic reduction in current collapse is achieved in GaN-based high-electron-mobility transistors (HEMTs) using dual-layer SiNx stressor passivation (DSSP), and the related mechanism is proposed. The SiNx compression neutralizes the inherent piezo polarization caused by the lattice mismatch at the heterojunction and effectively mitigates the peak electric field crowding at the drain-side gate edge, as supported by technology computer-aided design simulation. Thus, the inverse piezoelectric effect is suppressed and the trapped charge density is reduced under high electrical stress. As a result, the current collapse effect can be significantly restrained. Upon pulsing (Vg = −6 and Vds = 20 V), the device with DSSP exhibits a negligible current collapse (∼3%), which is significantly lower than the baseline device (∼34%). Moreover, it shows a one-order-of-magnitude reduction in gate leakage and a significant enhancement in gate stability. These results prove that the DSSP process is an attractive technique to facilitate high-reliability GaN-on-Si HEMTs.

In this work, we present the novel application of SiN_x stress-engineering techniques for the suppression of short-channel effects in AlGaN/GaN high-electron-mobility transistors (HEMTs), accompanied by a comprehensive analysis of the underlying mechanisms. The compressive stress SiN_x passivation significantly enhances the barrier height at the heterojunction beneath the gate, maintaining it above the quasi-Fermi level even as V_ds rises to 20 V. As a result, in GaN devices with a gate length of 160 nm, the devices with compressive stress SiN_x passivation exhibit significantly lower drain-induced barrier lowering (DIBL) factors of 2.25 mV/V, 2.56 mV/V, 4.71 mV/V, and 3.84 mV/V corresponding to drain bias voltages of 5 V, 10 V, 15 V, and 20 V, respectively. Furthermore, as V_ds increases, there is an insignificant degradation in transconductance, subthreshold swing, leakage current, or output conductance. In contrast, the devices with stress-free passivation show relatively higher DIBL factors (greater than 20 mV/V) and substantial degradation in pinch-off performance and output characteristics. These results demonstrate that the SiN_x stress-engineering technique is an attractive technique to facilitate high-performance and high-reliability GaN-based HEMTs for radio frequency (RF) electronics applications.

In this work, high threshold voltage and breakdown voltage E-mode GaN HEMTs using an Al:HfOx-based charge trapping layer (CTL) are presented. The developed GaN HEMTs exhibit a wide threshold modulation range of ΔVTH ∼ 17.8 V, which enables the achievement of enhancement-mode (E-mode) operation after initialization process owing to the high charge storage capacity of the Al:HfOx layer. The E-mode GaN HEMTs exhibit a high positive VTH of 8.4 V, a high IDS,max of 466 mA/mm, a low RON of 10.49 Ω mm, and a high on/off ratio of ∼109. Moreover, the off-state breakdown voltage reaches up to 1100 V, which is primarily attributed to in situ O3 pretreatment effectively suppressing and blocking leakage current. Furthermore, thanks to the VTH of GaN HEMTs being tunable by initialization voltage using the proposed CTL scheme, we prove that the direct-coupled FET logic-integrated GaN inverters can operate under a variety of conditions (β = 10–40 and VDD = 3–15 V) with commendable output swing and noise margins. These results present a promising approach toward realizing the monolithic integration of GaN devices for power IC applications.

In this work, the carrier transport mechanism of Mg/Pt/Au Ohmic contact on p-GaN/AlGaN/GaN with a very low specific contact resistivity of 1.98 × 10−5 Ω cm2 is investigated. Secondary ion mass spectroscopy measurement results show that the Mg concentration near the p-GaN surface increases form 8 × 1019 to 7 × 1020/cm3 for Mg/Pt/Au contact after annealing. It indicates that Mg atoms from the Mg/Pt/Au metal stack diffuse into the p-GaN during annealing, forming a heavily Mg doped p++-GaN layer with a depth of about 3 nm. The sheet resistance Rsh depends on temperature for Mg/Pt/Au contacts on p-GaN/GaN, indicating that the influence of 2DHG on carrier transport mechanisms at the metal/p-GaN interface was eliminated. For Mg/Pt/Au contacts at ≥360 K, specific contact resistivity reasonably follows T−1, which indicates that the band conduction of Schottky theory dominates the carrier transport. For Mg/Pt/Au contacts at 200–360 K, the electrical resistivity reasonably follows T−1/4, indicating variable-range hopping (VRH) conduction through Mg-related deep-level defects (DLD). Based on the VRH conduction model, the effective barrier height (qφ) of the Mg-related DLD band is extracted as 0.265 eV, which well matches the excellent Ohmic contact.