An all-digital RF signal generator using DeltaSigma modulation and targeted at transmitters for mobile communication terminals has been implemented in 90 nm CMOS. Techniques such as redundant logic and non-exact quantization allow operation at up to 4 GHz sample rate, providing a 50 MHz bandwidth at a 1 GHz center frequency. The peak output power into a 100 Omega diff. load is 3.1 dBm with 53.6 dB SNDR. By adjusting the sample rate, carriers from 50 MHz to 1 GHz can be synthesized. RF signals up to 3 GHz can be synthesized when using the first image band. As an example, UMTS standard can be addressed by using a 2.6 GHz clock frequency. The measured ACPR is then 44 dB for a 5 MHz WCDMA channel at 1.95 GHz with output power of -16 dBm and 3.4% EVM. At 4 GHz clock frequency the total power consumption is 120 mW (49 mW for DeltaSigma modulator core) on a 1 V supply voltage, total die area is 3.2 mm² (0.15 mm² for the active area).

This paper presents a low-power mixed-signal adaptive 60 GHz baseband in 65 nm CMOS. The design integrates variable gain amplifiers, analog phase rotator, 40-coefficient I/Q decision feedback equalizers (DFEs), clock generation and data recovery circuits, and adaptation hardware. The baseband achieves 10 Gb/s operation with BER <; 10^-12 while consuming 53 mW (adaptation on)/45 mW (adaptation off), of which the core signal processing circuits consume only 29 mW.

In this paper, a new methodology for choosing design parameters of level-crossing analog-to-digital converters (LC-ADCs) is presented that improves sampling accuracy and reduces the data stream rate. Using the MIT-BIH Arrhythmia dataset, several LC-ADC models are designed, simulated and then evaluated in terms of compression and signal-to-distortion ratio. A new one-dimensional convolutional neural network (1D-CNN) based classifier is presented. The 1D-CNN is used to evaluate the event-driven data from several LC-ADC models. With uniformly sampled data, the 1D-CNN has 99.49%, 92.4% and 94.78% overall accuracy, sensitivity and specificity, respectively. In comparison, a 7-bit LC-ADC with 2385 Hz clock frequency and 6-bit clock resolution offers 99.2%, 89.98% and 91.64% overall accuracy, sensitivity and specificity, respectively. It also offers 3x data compression while maintaining a signal-to-distortion ratio of 21.19 dB. Furthermore, it only requires 49% floating-point operations per second (FLOPS) for cardiac arrhythmia classification in comparison with the uniformly sampled ADC. Finally, an open-source event-driven arrhythmia database is presented.

This paper presents a reconfigurable semi-digital RFFIR filter suitable for digital transmitters using 1-bit DeltaSigma signal generation. A transmission line based 5-channel power combiner allows both increase of output power and programmable filtering of the signal. A prototype has been built with 65 nm CMOS and Integrated Passive Devices (IPD) technologies. The system exhibits a 14 dB power gain for a peak power of 17 dBm at 1.2 GHz and an attenuation of out-of band noise of up to 15 dB. CMOS and IPD chip size are respectively 2.05 mm² and 17.78 mm².

Wireless Body Area Networks (WBANs) are a fast-growing field fueled by the number of wearable devices developed for countless applications appearing on the market. To enable communication between a variety of those devices, the IEEE 802.15.6 standard was established. However, this standard has some intrinsic limitations in addressing the heterogeneity of the network nodes in terms of activity, data rates (from less than bit/s to multiple Mbit/s), energy availability, form factor, and location on, around or inside the body. To address these concerns, an alternative model is proposed that could serve as an extension of the IEEE 802.15.6 Standard. At its core is an adaptive and low-overhead synchronization scheme based on heartbeat sensing. This forms the base for a TDMA-based (Time Division Multiple Access) Media Access Control (MAC) protocol dedicated to multi-tier networks. While this effort focuses specifically on Capacitive Body-Coupled Communication (C-BCC), other physical layers can be easily incorporated as well. Based on these premises, this paper compares various random-access slot allocation approaches to accommodate the multiple data rates matching the system requirements, while incorporating a duty-cycling strategy anchored by heartbeat detection. This work proposes a novel, flexible, and robust solution, making use of heartbeat synchronization and addressing the corresponding challenges. It efficiently interconnects multiple device types over a wide range of data rates and targets a mesh of stars topology. At the cost of an increased communication latency, the proposed protocol outperforms the IEEE 802.15.4 MAC standard in terms of energy efficiency by a factor of at least 12x in a realistic scenario.