In this work, we report the digital and analog resistive-switching (RS) characteristics in a memristor based on silicon nanocrystals (Si-NCs) integrated into a complementary metal-oxide-semiconductor (MOS) structure. Si-NCs with a diameter of 5.48 ± 1.24 nm embedded in a SiO₂/Si-NCs/SiO₂ multilayer structure acts as an RS layer. These devices exhibit bipolar RS with an intermediate resistance step during SET and RESET processes, which is believed to lie in the Si-NCs layer acting as charge-trapping nodes. The endurance studies of about 70 DC cycles indicate an ON/OFF ratio of ~10⁶ and a retention time larger than 10⁴ s. Long-term potentiation (LTP, −2 V) and long-term depression (LTD, +4 V) are obtained by applying consecutive identical pulse voltages of 150 ms duration. The current value gradually increases/decreases (LTP/LTD) as the pulse number increases. Three consecutive identical pulses of −2 V/150 ms (LTP) separated by 5 and 15 min show that the last current value obtained at the end of each pulse train is kept, confirming an analog RS behavior. These characteristics provide a possible way to mimic biological synapse functions for applications in neuromorphic computing in Si-NCs-based CMOS structures.

In this work, the SET and RESET processes of bipolar resistive switching memories with silicon nanocrystals (Si-NCs) embedded in an oxide matrix is simulated by a stochastic model. This model is based on the estimation of two-dimensional oxygen vacancy configurations and their relationship with the resistive state. The simulation data are compared with the experimental current-voltage data of Si-NCs/Si${\mathrm{O}}_2$ multilayer-based memristor devices. Devices with 1 and 3 Si-NCs/Si${\mathrm{O}}_2$ bilayers were analyzed. The Si-NCs are assumed as agglomerates of fixed oxygen vacancies, which promote the formation of conductive filaments (CFs) through the multilayer according to the simulations. In fact, an intermediate resistive state was observed in the forming process (experimental and simulated) of the 3-BL device, which is explained by the preferential generation of oxygen vacancies in the sites that form the complete CFs, through Si-NCs.

This work reports on the correlation between resistive switching (RS) with capacitance switching (CS) states observed in SiO₂/Si-nanocrystals (Si-NCs)/SiO₂ stack layers using a metal-insulating semiconductor (MIS)-like device. The formation of Si-NCs, which act as conductive nodes, of about 6.7 nm in size was confirmed using a transmission electron microscope. These devices exhibit bipolar RS properties with an intermediate resistive state (IRS), which is a self-compliance behavior related to the presence of the Si-NCs layer. The current value changes from 40 nA to 550 µA, indicating RS from a high resistance state (HRS) to a low resistance state (LRS) with the IRS at 100 µA. The accumulation (C_A) and inversion capacitance (C_I) also change when these RS events occur. The C_A switches from 2.52 nF to 3 nF with an intermediate CS of 2.7 nF for the HRS, LRS, and IRS, respectively. The C_I also switches from 0.23 nF to 0.6 nF for the HRS and LRS, respectively. These devices show an ON/OFF current ratio of 10⁴ with retention times of 10⁴ s. Furthermore, both C_A and C_I states remained stable for more than 10³ s. These findings highlight the potential of these devices for applications in information storage through memristor and memcapacitor technologies.

This work focuses on developing resistive switching (RS) devices using thermally annealed (TA) SiO₂/Si multilayers (ML). Three SiO₂/Si bilayers were deposited with an additional 10 nm SiO₂ layer as a dielectric barrier layer on top of the ML. The SiO₂ layers were 6 nm thick, while the thickness of the Si layers varied from 2, 4, and 6 nm, and were labeled as ML-62, ML-64, and ML-66, respectively. X-ray photoelectron spectroscopy analysis revealed well-defined ML structures before TA. However, after TA, samples ML-64 and ML-62 showed discontinuities due to diffusion between neighboring Si layers, increasing the dimensions of the Si-rich regions. In fact, the concentration of elemental Si (Si⁰) within the intermediate Si layer increases as the Si layer becomes thinner. Consequently, the size of Si-nanocrystals, created after TA, increases from 6 to 8.5 nm for ML-66 to ML-62, as confirmed by Raman and transmission electron microscopy analysis. The composition discontinuities and loss of the ML structure resulted in erratic electrical behavior, with an electroforming (EF) voltage as high as −14 V in sample ML-62. For the ML-66, which retained the ML structure, the EF voltage was reduced to −4 V, showing SET/RESET values of around ±3 V and stable electrical behavior, with an ON/OFF ratio of up to seven orders of magnitude. This demonstrates the importance of the ML design in the operation of RS devices.