This paper deals with the problem of local ambiguity function shaping in the presence of narrow-band spectral interferences (e.g., the communication signal and jamming), which has significant applications in the radar detection field. An objective function involving the weighted integrated sidelobe level and the spectral stopband energy is developed as a figure of merit to minimize. Besides, the energy and the peak-to-average ratio restrictions are forced on the probing waveform. To handle the resulting non-convex quartic optimization problem, an iterative sequential quartic optimization algorithm sharing polynomial time complexity is proposed. In each iteration, it decomposes the original problem into two alternately tractable quadratic subproblems both of which can be converted to linear optimization problems with closed-form solutions. Finally, the numerical simulations are provided to assess the effectiveness of the proposed algorithm. The results show that the proposed algorithm outperforms some available counterparts in the aspect of the convergence speed and the capability to prohibit the narrow-band spectral interferences and the sidelobes of a strong return from masking weak targets.

The output bandwidth and the capability to generate multiple analog outputs with accurately adjustable relative phase are important specifications of arbitrary waveform generator (AWG). To increase the output bandwidth, AWG with a multi-memory paralleled direct digital synthesizer structure (DDS) was proposed to break through operating speed limitations of memory and field programmable gate array. But this structure does complicate synchronization of the analog outputs. This paper proposes a structure for synchronization of the outputs of multi-channel high speed AWG that generates arbitrary waveforms using a multi-memory paralleled DDS. Careful distribution of the clock and trigger signals enables elimination of the random initial phase caused by the frequency divider. Based on this structure, a four-channel 600 mega samples per second AWG is designed. An embedded clock synchronization calibration module is designed to eliminate the random phase difference caused by a frequency divider inside a digital-to-analog converter. The AWG provides a 240 MHz bandwidth, 16 mega-samples storage depth, inter-channel initial skew accuracy less than 150 ps, and 0.0001° phase resolution, which can be used to generate two pairs of I/Q signals or a pair of differential I/Q signals for the quadrature modulator. Additionally, more AWGs can be cascaded to obtain more output channels with an output timing skew between adjacent channels of less than 1.6 ns.

Integrated circuit (IC) test is a critical component in ensuring product quality, reliability, and cost control within the IC manufacturing process. Due to the increasingly integrated nature of system-on-chip (SoC) designs, the demand for studying mix-signal test in SoC dominates the chip test nowadays. While numerous test methodologies, such as structural test, IDDQ test, static or dynamic parameter characterization, and data processing, have been extensively studied, most of these focus on isolated test items for efficiency or fault coverage. Very limited work has been conducted on efficiency analysis across the entire manufacturing process. To address these limitations, this review synthesizes guidelines to reduce test costs while maintaining fault coverage throughout the entire test paradigm. Based on applicability, SoC test methods are primarily divided into three categories: direct test with automatic test equipment (ATE), test with design for test (DFT) technology, and failure analysis methods. To further assist researchers and engineers with diverse needs, these methods are subclassified by test objectives: rapid assessment, comprehensive diagnostics, and predictive analytics. Additionally, we introduce a novel metric, the extra information gain cost, to evaluate efficiency throughout the entire test process. Finally, the review highlights emerging research directions, such as aging prognosis and test in advanced package.