Asun Pérez-Pascual

Dr. Asun Pérez-Pascual

orcid

Research Focus & Metrics

Academic Career Length

25Years (2002-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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9 October 2006 in IEEE Communications Magazine
Verified
Journal Article
Closed access
JVJavier Valls
Javier Valls
TST. Sansaloni
T. Sansaloni
APAsun Pérez-Pascual
Asun Pérez-Pascual
VTV. Torres
V. Torres
VAVicenç Almenar
Vicenç Almenar
CORDIC is a versatile algorithm widely used for VLSI implementation of digital signal processing applications. This article presents a tutorial of how to use CORDIC to implement different communication subsystems that can be found in a software defined radio. Specifically, it shows how to use CORDIC to implement direct digital synthesizers, AM, PM, and FM analog modulators and ASK, PSK and FSK modulators, up-/down-converters of in-phase and quadrature signals, full mixers for complex signals, and phase detection for synchronizers. The article also shows some tricks to efficiently implement the algorithm

15 September 2005 in Electronics Letters
Verified
Journal Article
Closed access
TST. Sansaloni
T. Sansaloni
APAsun Pérez-Pascual
Asun Pérez-Pascual
VTV. Torres
V. Torres
JVJavier Valls
Javier Valls
The most area-efficient pipeline FFT processors for WLAN MIMO-OFDM systems are presented. It is shown that although the R23SDF architecture is the most area-efficient approach for implementing pipeline FFT processors, RrMDC architectures are more efficient in MIMO-OFDM systems when more than three channels are used.

13 August 2007 in IEEE Transactions on Education
Verified
Journal Article
Closed access
TSTrini Sansaloni
Trini Sansaloni
APAsun Pérez-Pascual
Asun Pérez-Pascual
VTVicente Torres
Vicente Torres
VAVicenç Almenar
Vicenç Almenar
JAJosé Francisco Toledo Alarcón
José Francisco Toledo Alarcón
JVJavier Valls
Javier Valls
This paper presents a course on digital signal processing with field-programmable gate arrays (FPGA) devices. The course integrates two separate disciplines, digital signal processing (DSP) and very large scale integration (VLSI) design, and focuses on the development of a sophisticated DSP design from simulation to fixed-point implementation. The structure and methodology used in the proposed course are oriented to the design and implementation of an fast Fourier transform (FFT) spectrum analyzer. This application covers most topics included in a DSP course and gives better results that those obtained with typical courses performing independent multiple simple experiments. The project is divided into modules that show specific learning necessities and determine the course contents and organization. Each laboratory part is dedicated to design and implements the block of the analyzer related to the theoretical content presented in the class. At the end of the course the students have designed all the pieces in the DSP project and have completed and verified the system. The used methodology enables students and engineers to understand and develop complex fixed-point applications, looking for the best signal processing algorithms on hardware implementations, and also results in more motivated and active students.

13 May 2023 in Education Sciences
Verified
Journal Article
Open access
PDF file
MGMacarena Trujillo Guillen
Macarena Trujillo Guillen
LALorena Atarés
Lorena Atarés
MSMªJosé Canet Subiela
MªJosé Canet Subiela
APAsun Pérez-Pascual
Asun Pérez-Pascual
The concept of function is a threshold concept in mathematics since it is essential for a deep understanding of the subject and is often problematic for students. Despite the importance of this concept, numerous studies have found that students have several difficulties and misconceptions about it. This work aims to assess, classify and synthesize the existing information about the learning difficulties and misconceptions related to the concept of function. In this sense, the main achievement of the work is the synthesis and classification by topics of the information gathered from the literature.

12 October 2005
Verified
Conference Paper
Closed access
FAF. Angarita
F. Angarita
APAsun Pérez-Pascual
Asun Pérez-Pascual
TST. Sansaloni
T. Sansaloni
JVJavier Valls
Javier Valls

18 September 2003 in Electronics Letters
Verified
Journal Article
Closed access
TST. Sansaloni
T. Sansaloni
APAsun Pérez-Pascual
Asun Pérez-Pascual
JVJavier Valls
Javier Valls
A novel architecture for computing the fast Fourier transform on programmable devices is presented. Main results indicate that the use of one CORDIC operator to perform the multiplication by all the ‘twiddle factors’ sequentially leads to an area saving up to 35% with respect to other cores.