Bharatha Kumar Thangarasu

Prof. Bharatha Kumar Thangarasu

orcid

Research Focus & Metrics

Academic Career Length

13Years (2014-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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22 May 2023 in IEEE Transactions on Circuits and Systems I: Regular Papers
Verified
Journal Article
Closed access
LCLiying Cai
Liying Cai
XSXiong Song
Xiong Song
ZLZhenghao Lu
Zhenghao Lu
XiaoPeng YuXiaoPeng Yu
XiaoPeng Yu
Kiat Seng YeoKiat Seng Yeo
Kiat Seng Yeo
BTBharatha Kumar Thangarasu
Bharatha Kumar Thangarasu
A reconfigurable fully integrated automatic gain control (AGC) amplifier is presented which is based on a dual mode continuous gain adjustment variable-gain amplifier (VGA). The VGA is realized based on the current-steering structure, achieving a linear-in-dB gain tuned by AGC’s feedback voltage. A current division active load is proposed, which provides additional gain control range and realizes gain robustness to process and supply variations without extra calibration. Simulated with Cadence IC, the maximum gain variations due to process and supply variations are 3.5 dB and 2.6 dB, respectively. By using dual mode gain tuning technique, the VGA achieves a total gain range of 68.2 dB. Both bandwidth and gain of the VGA are adjusted independently. The AGC is realized in UMC 55-nm CMOS technology with 0.026 mm 2 core area. With the current division ratio K of 0.5, the proposed VGA achieves a linear-in-dB gain of 42.2 dB ( $-$ 30.0 to 12.2 dB) with less than 0.79 dB error. The $-$ 3 dB bandwidth can be adjusted from 80 MHz to 140 MHz and is insensitive to gain variations. The power dissipation is from 2.9 mW to 4.5 mW. This design features bandwidth scalability and the gain independent of bandwidth to achieve various applications.

20 July 2017 in IEEE Microwave and Wireless Components Letters
Verified
Journal Article
Closed access
BTBharatha Kumar Thangarasu
Bharatha Kumar Thangarasu
KMKaixue Ma
Kaixue Ma
Kiat Seng YeoKiat Seng Yeo
Kiat Seng Yeo
A bidirectional low-noise amplifier (LNA) is presented in this letter. By using transistor bias control and low-loss coplanar waveguide structures with defected ground shield as both interconnect traces and distributed passives, the proposed two-port bidirectional amplifier achieves a measured performance close to the stand-alone LNA from 54 to 65 GHz. The design is fabricated in a 0.18-μm SiGe BiCMOS process consuming a maximum 10.6-mA current from a 1.8-V supply voltage and occupies a 0.85-mm 2 core die area.

18 August 2017 in IEEE Microwave and Wireless Components Letters
Verified
Journal Article
Closed access
DZDawei Zhang
Dawei Zhang
XXXin Xu
Xin Xu
HYHongxi Yu
Hongxi Yu
JLJun Li
Jun Li
BTBharatha Kumar Thangarasu
Bharatha Kumar Thangarasu
Kiat Seng YeoKiat Seng Yeo
Kiat Seng Yeo
In this letter, a modified predistortion linearizer model is proposed to enable wideband synthesis of phase predistortion function. Additional time delay based on an artificial left-handed transmission line is introduced in the model to characterize the frequency-dependent phase conversion function, which can be utilized for wideband cancelation of the AM/PM distortion in microwave power amplifiers. Based on the proposed model, a microwave monolithic integrated circuit predistorter is designed to generate both positive gain and phase conversion according to the input power, and to realize increasing phase conversion as frequency increases. Large signal measurement of the design is performed at 20, 20.75, and 21.5 GHz. Result shows that +4.8-dB gain conversion is achieved, while phase conversion increases from +12.9° to +30.8° as frequency increases from 20 to 21.5 GHz.

1 June 2014
Verified
Conference Paper
Closed access
BTBharatha Kumar Thangarasu
Bharatha Kumar Thangarasu
KMKaixue Ma
Kaixue Ma
Kiat Seng YeoKiat Seng Yeo
Kiat Seng Yeo
WYWanlan Yang
Wanlan Yang
A 6-bit programmable gain amplifier (PGA) with current mode exponential gain control is presented in this paper that achieves a linearity error within ±0.1 dB over a 30-dB wide gain control range. The proposed design topology has two digitally-variable gain amplifiers and a post amplifier that are interconnected by a differential pair wideband matching network to provide an enhanced gain bandwidth product. The proposed PGA has 35 mW power consumption and occupies 0.25 mm 2 core die area.

9 February 2024 in IEEE Microwave and Wireless Technology Letters
Verified
Journal Article
Closed access
BTBharatha Kumar Thangarasu
Bharatha Kumar Thangarasu
KMKaixue Ma
Kaixue Ma
Kiat Seng YeoKiat Seng Yeo
Kiat Seng Yeo
This letter presents a Ku-band fully differential low-noise amplifier (LNA) using current reuse technique and weakly saturated input SiGe heterojunction bipolar transistors (HBTs) pair. The proposed LNA design achieves a measured peak gain of 18 dB, a 3-dB bandwidth from 11.5 to 17.4 GHz, a minimum noise figure (NF) of 3 dB, and an input 1-dB compression point of $-$ 15-dBm while consuming only 6.4 mA from a 1.8-V supply voltage. By achieving a lower power consumption, the proposed design has an improved figure-of-merit (FoM) than the state-of-the-art works. Furthermore, by incorporating a digitally variable gain control, the proposed design can improve the dynamic range by 14.4 dB. The proposed design is fabricated in a 0.18- $\mu$ m SiGe BiCMOS technology and occupies a core die area of 0.22 mm $^{2}$ (excluding measurement pads).

13 April 2017 in IEEE Microwave and Wireless Components Letters
Verified
Journal Article
Closed access
DZDawei Zhang
Dawei Zhang
BZBo Zhang
Bo Zhang
HYHongxi Yu
Hongxi Yu
JLJun Li
Jun Li
BTBharatha Kumar Thangarasu
Bharatha Kumar Thangarasu
Kiat Seng YeoKiat Seng Yeo
Kiat Seng Yeo
This letter presents a 45-75 GHz balanced vector modulator (VM) with a built-in voltage converter for quadrature phase shift keying modulation. With embedded voltage converter, the design becomes less sensitive to threshold voltage variation. The effect of the Lange coupler's coupling factor and cold FET's total gate width on wideband symmetry performance of the modulator is investigated. A 30-GHz operation bandwidth centered at 60 GHz is achieved by using a 0.15-μm GaAs pHEMT process. On-wafer measurement results of the VM show that, from 58 to 67 GHz, the amplitude and phase errors are better than ±0.45 dB and ±2°, respectively. Within a wide frequency range of 45-67 GHz, for all modulation states, the amplitude and phase errors are within ±0.9 dB and ±4°, respectively, while the insertion loss is less than 11.5 dB and return loss is better than 10 dB.