In this paper, a wideband accurate dB-linear variable-gain amplifier (VGA) is presented, which consists of three cascading gain stages with dc-offset cancellation. Based on duplicate biasing and active load techniques, this VGA achieves merits such as simple and accurate continuous dB-linear gain control, gain robustness to process and supply voltage variation and constant bandwidth at different gain settings. The dB-linear gain control is realized based on exponential current steering. The exponential conversion can be based on bipolar transistors or MOS transistors in subthreshold region. Both ways are implemented in this design for comparison purpose. With temperature compensation circuit, this VGA is insensitive to temperature variation. All gain stages of the VGA share the same biasing, exponential V-I conversion and temperature compensation circuits to reduce design complexity. This proposed VGA is fabricated in 55-nm CMOS technology with a core area of 0.033 mm². The measurement results show the proposed VGA has a dB-linear gain-control range from -37dB to 14 dB with an error within 0.65 dB. The -3dB bandwidth of the VGA is 740 MHz and is nearly constant when the gain varies. The core VGA circuit consumes about 2.49 mW. The proposed design features wide bandwidth, small chip area, and low power consumption.

A reconfigurable fully integrated automatic gain control (AGC) amplifier is presented which is based on a dual mode continuous gain adjustment variable-gain amplifier (VGA). The VGA is realized based on the current-steering structure, achieving a linear-in-dB gain tuned by AGC’s feedback voltage. A current division active load is proposed, which provides additional gain control range and realizes gain robustness to process and supply variations without extra calibration. Simulated with Cadence IC, the maximum gain variations due to process and supply variations are 3.5 dB and 2.6 dB, respectively. By using dual mode gain tuning technique, the VGA achieves a total gain range of 68.2 dB. Both bandwidth and gain of the VGA are adjusted independently. The AGC is realized in UMC 55-nm CMOS technology with 0.026 mm ² core area. With the current division ratio K of 0.5, the proposed VGA achieves a linear-in-dB gain of 42.2 dB ( $-$ 30.0 to 12.2 dB) with less than 0.79 dB error. The $-$ 3 dB bandwidth can be adjusted from 80 MHz to 140 MHz and is insensitive to gain variations. The power dissipation is from 2.9 mW to 4.5 mW. This design features bandwidth scalability and the gain independent of bandwidth to achieve various applications.

In this letter, a variable-gain amplifier (VGA) cell with an accurate dB-linear characteristic is proposed. By adopting a double-duplicate-biasing technique, this VGA cell achieves simple but effective continuous dB-linear gain control. The VGA cell features wide bandwidth, small chip area, and low power consumption. Based on the proposed VGA cell, we implement a fully differential three-stage VGA with dc-offset cancellation. This three-stage VGA is fabricated in a 0.13-μm CMOS technology with a core area of 0.1 mm ² . The measurement result shows the proposed dB-linear VGA presents gain-tuning range from -21 dB to 20 dB with dB-linear error of about 0.6 dB. At the maximum gain setting, an output P _1dB of -12 dBm and a noise figure of 27 are measured. The -3-dB bandwidth of the VGA is 580 MHz, and the core circuit consumes about 4.15 mA from a single 1.2-V supply.

This letter presents a low-power dB-linear variable gain amplifier (VGA) with a small linear-in-dB error over a wide gain tuning range. An exponential current ratio is realized in the linear-in-dB control circuit based on the subthreshold I-V characteristic. The VGA is built with subthreshold common-gate transistors as current steering, accurately replicating the exponential current ratio and forming a tunable gain. Implemented in 55-nm CMOS technology, the proposed VGA occupies a compact active area of 0.011 mm2 excluding the buffer. It achieves a linear-in-dB error of 0.4 dB over a gain tuning range of 62.4 dB, corresponding to the state-of-the-art relative error of 0.6%. The proposed design shows constant 80-MHz bandwidth with a power consumption of 0.96-mW.

As a fundamental component of inertial measurement, micro electromechanical systems (MEMS) gyroscopes are extensively utilized in industrial robotics, drones, and personal navigation systems. Triaxial MEMS gyroscopes, capable of simultaneously measuring angular rates along three axes and providing three-dimensional orientation, have garnered significant attention in recent years. This paper presents three contemporary integration methods for triaxial MEMS gyroscopes: 3D integration of three single-axis gyroscopes, the monolithic single-structure triaxial gyroscope, and the monolithic multi-structure gyroscope array. Furthermore, the methods are compared and analyzed, discussing their respective advantages and disadvantages, while the future applications and development trends of triaxial MEMS gyroscopes are explored.