Gallium nitride (GaN) transistors enable efficient and compact high-voltage power converters. In the state-of-the-art enhancement mode GaN-on-Si technology, a 650-V power transistor is formed as a lateral structure enabling monolithic integration with a driver and analog control circuits on one die. Offline power converters show a trend toward a higher level of integration, shifting from monolithic silicon (CMOS) to various integration levels in GaN technology. In this article, a monolithic, self-biased GaN buck converter for offline operation is presented, supporting both 110- and 230-V ac line voltage and providing up to 29-W output power. The converter shows a superior efficiency of 95.6 % and a very high level of integration in a 650-V p-GaN gate e-mode GaN-on-Si technology. Analog design techniques for GaN integration, such as an auto-zero comparator and a high-voltage supply regulator, are discussed. Experimental results of stand-alone circuit blocks and the full buck converter confirm the viability of monolithic GaN integration as a path toward compact and efficient offline power converters.

This paper presents a fully integrated gate driver in a 180-nm bipolar CMOS DMOS (BCD) technology with 1.5-A max. gate current, suitable for normally off gallium nitride (GaN) power switches, including gate-injection transistors (GIT). Full-bridge driver architecture provides a bipolar and three-level gate drive voltage for a robust and efficient GaN switching. The concept of high-voltage energy storing (HVES), which comprises an on-chip resonant LC tank, enables a very area-efficient buffer capacitor integration and superior gate-driving speed. It reduces the component count and the influence of parasitic gate-loop inductance. Theory and calculations confirm the benefits of HVES compared to other capacitor implementation methods. The proposed gate driver delivers a gate charge of up to 11.6 nC, sufficient to drive most types of currently available GaN power transistors. Consequently, HVES enables to utilize the fast switching capabilities of GaN for advanced and compact power electronics.

This paper presents a dc-dc converter for integration in the power management unit of an ultra-low power microcontroller. The converter is designed to significantly reduce the wake-up energy and startup delay of the supplied core. The use of a minimized output capacitor is the key factor to save the wake-up energy. The converter is buffered with only 56 nF and guarantees a stable output of 1.2 V with a voltage ripple smaller than 30 mV. The controller of the proposed dc-dc converter is based on a predictive peak current control that allows the system to control the energy transfer at extremely low power consumption. The proposed circuit is implemented in 130-nm CMOS technology with an area of only 0.14 mm ² . It achieves a high conversion efficiency of 92.1% and a small quiescent current of 440 nA. It operates from 1.8 to 3.3 V with a maximum load of 2.65 mA.

In recent years, an increasing trend towards GaN integration can be observed, enabled by the lateral structure of the GaN technology. A key improvement over a discrete implementation is the integration of a monolithic gate driver. This tutorial-style paper aims to give insight into the design flow. It starts with the possibilities of GaN technologies in terms of IC design followed by basic driving principles of GaN HEMTs. Gate loop requirements and recommendations for the gate driver output stage are explained. A flowchart for the design of integrated gate drivers is presented with the boundary constraints from the technology, topology research, and selection using a step-by-step guide. The design flow is run through with an example scenario and the realized gate driver design is optimized for low power consumption and fast switching, which is verified with simulations and measurements. Thus, a guide is given for the design of a monolithically integrated GaN gate driver to further advance, promote, and accelerate integration in GaN.

The maintenance issue of batteries and the limited power level of energy harvesting is addressed by the presented integrated micropower supply. Connected to the 120/230-VRMS mains, it provides a 3.3-V ac output voltage, suitable for applications such as the Internet-of-Things and smart homes. The micropower supply consists of a fully integrated ac-dc and dc-dc converter with one external low-voltage surface mount device buffer capacitor, resulting in an extremely compact size. Fabricated in a low-cost 0.35-μm 700-V complimentary metal-oxide-semiconductor technology, it covers a die size of 7.7 mm ² . The ac-dc converter is a direct coupled, full-wave rectifier with a subsequent series regulator. The dc-dc stage is a fully integrated capacitive 4:1 converter with up to 17-V input and 47.4% peak efficiency. The power supply comprises several high-voltage control circuits including level shifters and various types of charge pumps (CPs). A source-supplied CP is utilized that supports a varying switching node potential. The overall losses are discussed and optimized, including flying capacitor bottom-plate losses. The power supply achieves an output power of 3 mW, resulting in a power density of 390 μW/mm ² . This exceeds prior art by a factor of 11.

In this article, a hybrid step-up/down converter is presented with improved efficiency, smaller form factor, and enhanced reliability for Li-ion-battery-operated power management integrated circuits. Utilizing a hybrid structure with one inductor and two flying capacitors, the dual-path buck–boost (DPBB) converter reduces the average inductor current, switch currents, and the required blocking voltage for the power switches. To support a mid-3-V output from a Li-ion battery, the converter can be realized using 1.8-V rated devices, solely. In addition, the DPBB facilitates a continuous input and output current delivery, thus improving the reliability of the converter significantly. Besides, leveraging the Li-ion battery charge profile, the topology provides an optimal performance during downconversion, in which the converter operates for most of its usage time. With reduced inductor current and smaller voltage rated switches, a more compact inductor with a large dc resistance (DCR) can be used to maintain similar efficiency, which, in turn, helps reduce the converter board space and associated manufacturing cost. Fabricated in a 180-nm BCD technology, the prototype achieves a peak efficiency of 95.63% even for a large 288-m $\Omega$ inductor DCR with an output ripple below 20 mV for a load current up to 700 mA.