GaN technology is on the advance for the use in power ICs thanks to space-saving integrated circuit components and the increasing number of integrated devices. This work experimentally investigates a number of key building blocks for GaN power integration. First, an overview of the active and passives devices of the technology is given with focus on area-efficient layouts for power transistors and limitations of on-chip capacitors and inductors with comparison to other IC technologies. Digital and analog basic circuits as part of device libraries are examined and optimized with regard to area-efficiency. The NOT gates have active areas as low as 56.7 μm2 and max. static currents of 0.12 mA with high noise margins. Further digital gates are presented. For the analog circuits, differential amplifiers and voltage reference concepts are presented and compared. Finally, GaN power integration is discussed, and integration levels are defined and described. The GaN technology is compared with other IC technologies, and future challenges and perspectives are shown. GaN power integration based on building blocks aims to exploit the full potential of the lateral GaN technology in order to compete with Si-based IC technologies in the future.

In recent years, an increasing trend towards GaN integration can be observed, enabled by the lateral structure of the GaN technology. A key improvement over a discrete implementation is the integration of a monolithic gate driver. This tutorial-style paper aims to give insight into the design flow. It starts with the possibilities of GaN technologies in terms of IC design followed by basic driving principles of GaN HEMTs. Gate loop requirements and recommendations for the gate driver output stage are explained. A flowchart for the design of integrated gate drivers is presented with the boundary constraints from the technology, topology research, and selection using a step-by-step guide. The design flow is run through with an example scenario and the realized gate driver design is optimized for low power consumption and fast switching, which is verified with simulations and measurements. Thus, a guide is given for the design of a monolithically integrated GaN gate driver to further advance, promote, and accelerate integration in GaN.

In this letter, we report a large-area lateral AlGaN/GaN-on-Si power rectifier as diode with low turn-on voltage. The lateral field-effect rectifier (LFER) is based on a normally-off HEMT in reverse conduction with very low threshold-voltage and shorted gate-source terminal. A p-GaN gate module was used to realize the normally-off HEMT. The large-area LFER achieves a turn-on voltage of down to 0.2 V, a specific on-resistance of 10.8 mΩ×cm2, a maximum current of above 9 A with a gate width of 87 mm, and a leakage current of 57 μA/mm at a blocking voltage of 500 V. Test structures exhibit a breakdown voltage of 676 V. The effect of different depletion zone lengths, temperature influences and distribution on the turn-on voltage are investigated. Finally, this work shows that this approach of a p-GaN LFER has a great potential for rectifiers for next-generation power electronics.

In this letter, a vertical GaN power transistor driven by lateral devices fabricated in the same technology is demonstrated. The technology combines a co-integrated large area current aperture vertical electron transistor (CAVET) with high electron mobility transistors (HEMTs) for the realization of the driver on a GaN substrate. The quasi-monolithic integrated driver stage consists of two HEMT devices in a push-pull configuration. The CAVET and HEMTs are characterized, separated, packaged, and measured in a double pulse test setup with inductive load. The voltage signals of the HEMT driver with CAVET are shown in continuous operation up to 5 MHz and extreme duty-cycles. In pulsed operation, switching characteristics and waveforms under load up to 120 V and 4.1 A are shown with turn-on/-off switching times of 17.3/2.8 ns. Finally, this work demonstrates a GaN technology that combines the functional integration of a driver stage with a vertical power transistor and thus opens the pathway to continue lateral GaN power integration in vertical device concepts.

This work combines a 99.2% efficient GaN-based low-voltage fast-switching half-bridge converter with a Si-based high-voltage slow-switching and almost lossless switched capacitor multiplexer using a partial power processing approach to a six-level prototype with 99.74% efficiency. A loss breakdown shows how the ideal partial power processing efficiency is theoretically increased to 99.84% by using four additional voltage levels, but then reduced to the measured efficiency by the additional static and dynamic losses of the multiplexer. For electrocaloric heat pumps, an emerging technology for cooling and heating applications with zero global warming potential, such high charging efficiencies enable a high heat pump system coefficient of performance (COP). Based on available data of electrocaloric lead magnesium niobate (PMN)-based samples, and based on a first-principle and best-case analysis for Carnot-like cycles, it is predicted that the 99.74% electrical charging efficiency in combination with the electrocaloric material data enables to surpass 50% of the thermal Carnot limit (for cooling with a heat pump). Ultra-high efficiency of power converters thus pave the way towards future electrocaloric heat pumps of competitive system performance.