A proper thermal network model (TNM) facilitates the thermal analysis of multichip power modules and is beneficial to the reliability evaluation of power converters. However, many TNMs are struggling to provide the accurate thermal analysis while maintaining acceptable computational efficiency. To address this, a TNM based on the Cauer model is proposed in this article, where the Cauer model is obtained with the assistance of the structure function. Then, the thermal coupling effects in multichip power modules are fully characterized. More specifically, the thermal coupling in the proposed TNM is equivalent to the injected power losses from the specific nodes, and an enumeration method is accordingly used to identify the injected nodes and the injected power losses. Moreover, a discretization approach based on the forward Euler method is implemented to enhance the computational efficiency. Subsequently, the junction temperature of the multichip power module is estimated through the signal-flow graph method. Finally, the proposed TNM uses the typical insulated-gate bipolar transistor modules as a case study, and extensive simulations and experimental tests are conducted to validate the effectiveness of the proposed TNM.

The reliability of single-phase cascaded H-bridge rectifiers (SPCHBR) is regarded as one of the most important factors for achieving the improvement of the stability and availability of the single-phase power electronic traction transformer (PETT) in the railway traction system. Accordingly, an open-circuit fault diagnosis approach for single transistor faults in the SPCHBR is proposed in this paper. The proposed diagnostic algorithm relies on the state estimator and normalized detection variables. Moreover, fault cell detection and fault transistor location can be implemented according to the characteristics of the voltage and current residuals. The proposed method requires no additional sensors and only the information from the control system. Furthermore, the diagnostic method has fast diagnosis speed and robustness against false alarms under different operating conditions. Test results in the hardware-in-the-loop (HIL) system have illustrated the validity and feasibility of the proposed diagnostic method.

In the railway traction drive system, the reliability of DC-link capacitor banks faces enormous challenges due to the multioperation conditions, the complex physical structures, and the safe operation requirements. Considering these issues, this article proposes a reliability evaluation method of the DC-link capacitors banks to provide a guideline for preventive maintenance in the traction drive system. In the electrothermal stress analysis, different from the conventional methods, the dynamic power loss profile is obtained by the sliding-window discrete Fourier transform (DFT), and the equivalent series resistance is fit by the neural network. Afterward, a bidirectional thermal model is established to estimate the thermal stress under the dynamic power losses, considering the impact of thermal capacity, thermal coupling, and air-cooling heat dissipation. In addition, according to the stability analysis and the rated temperature limitation, an end-of-lifetime standard that meets the safe operation requirement of the train is first proposed, thereby evaluating the lifetime bottleneck of the DC-link capacitor banks. The evaluation results can provide a reference to use the low-cost on-condition maintenance instead of scheduled maintenance in the railway traction drive system. Furthermore, a prototype experiment is performed to verify the effectiveness of the electrothermal stress model.

The single-phase cascaded H-bridge multilevel converter (CHBMC) stands out as a prominent topology in medium- and high-voltage applications due to its scalability and modularity. However, the CHBMC may encounter multiple open-circuit (OC) switch faults, leading to significant degradation in both dc voltages and grid current. To facilitate fault-tolerant operation postidentification of multiple OC switches, conventional approaches typically involve adjusting phase angles in the pulsewidth modulation. This, however, results in complex control loops for dc voltage balancing and lacks flexibility. This article proposes a simple fault-tolerant control (FTC) technique based on online vector calculation and a constraint mechanism to simultaneously address multiple objectives, including dc voltage balancing, reduction of grid current total harmonic distortion, and even power distribution following OC switch faults in the CHBMC. Depending on the specific OC switches involved, the voltage levels of healthy or faulty power cells are automatically calculated and adjusted using vector constraints to maintain balanced dc voltages and mitigate current harmonics. Subsequently, the resulting vectors are flexibly determined to meet the requirements of reduced voltage stress and even power distribution. This technique is independent of voltage levels and easily extended to the single-phase CHBMC with more faulty power cells. Experimental results validate the effectiveness of the proposed FTC technique.

Data-driven solutions like artificial intelligence (AI) are more upright and effectual for fault diagnosis in the power converter system. To decrease computing load and improve the diagnosis speed of the intelligent algorithm, a high-accuracy-light-AI data-driven open-circuit diagnosis method is proposed to diagnose single or multiple IGBT open-circuit faults in the single-phase pulse width modulation (PWM) rectifiers. Firstly, the fault characteristics of three fault scenarios are analyzed to seek the most critical features and provide prior knowledge for developing the intelligent diagnostic algorithm. Then, a fast-learning algorithm named random vector function link network (RVFL) is utilized to extract the mapping knowledge between the well-selected features and fault modes. To balance the testing accuracy and calculation time of the diagnostic algorithm, the RVFL parameters are tuned to decrease the computing burden. After that, a decision-making framework is designed for identifying the faults in real-time. Finally, the effectiveness of the proposed fault diagnosis method is thoroughly verified by extensive experimental tests. A substantial comparison to state-of-the-art techniques shows the proposed scheme’s superiority in diagnostic accuracy, computing time, and diagnosis time.

The increasing importance of cascaded H-bridge multilevel converters (CHBMCs) in high-power applications requires a higher priority to detect and protect against fault conditions. In this article, a current residual-based diagnosis scheme is proposed for the CHBMCs without additional sensors. On the premise of filtering the sampled dc voltages, comparing the calculated actual values of output current with the expected values in the control system, normalized diagnostic variables are established to localize single or multiple open-circuit switches. Benefit from the diagnostic variables corresponding directly to the switches of each H-bridge, this method can be easily extended to the CHBMCs with arbitrary submodules. Furthermore, the parameter estimation and enhanced detection algorithm are introduced to ensure the immunity of the diagnostic method to the large parameter changes and measurement noises. The faulty component can be accurately diagnosed within one line cycle regardless of the faulty modules and operating conditions. The effectiveness of the proposed method is substantiated using experimental results from the hardware platform of the CHBMCs.