Visible light communication (VLC) has contributed new unused spectrum in addition to the traditional radio frequency communication and can play a significant role in wireless communication. The adaptation of VLC technology enhances wireless connectivity both in indoor and outdoor environments. Multiple-input multiple-output (MIMO) communication has been an efficient technique for increasing wireless communications system capacity and performance. With the advantages of MIMO techniques, VLC can achieve an additional degree of freedom. In this paper, we systematically perform a survey of the existing work based on MIMO VLC. We categorize the types of different MIMO techniques, and a brief description is given. Different problem-solving approaches are given in the subsequent sections. In addition, machine learning approaches are also discussed in sufficient detail. Finally, we identify the future study direction for MIMO-based communication in VLC.
Precise time-of-arrival (TOA) estimation is one of the most important techniques in RF-based positioning systems that use wireless sensor networks (WSNs). Because the accuracy of TOA estimation is proportional to the RF signal bandwidth, using broad bandwidth is the most fundamental approach for achieving higher accuracy. Hence, ultra-wide-band (UWB) systems with a bandwidth of 500 MHz are commonly used. However, wireless systems with broad bandwidth suffer from the disadvantages of high complexity and high power consumption. Therefore, it is difficult to employ such systems in various WSN applications. In this paper, we present a precise time-of-arrival (TOA) estimation algorithm using an IEEE 802.15.4 ZigBee system with a narrow bandwidth of 2 MHz. In order to overcome the lack of bandwidth, the proposed algorithm estimates the fractional TOA within the sampling interval. Simulation results show that the proposed TOA estimation algorithm provides an accuracy of 0.5 m at a signal-to-noise ratio (SNR) of 8 dB and achieves an SNR gain of 5 dB as compared with the existing algorithm. In addition, experimental results indicate that the proposed algorithm provides accurate TOA estimation in a real indoor environment.
Most approaches for moving object detection (MOD) based on computer vision are limited to stationary camera environments. In advanced driver assistance systems (ADAS), however, ego-motion is added to image frames owing to the use of a moving camera. This results in mixed motion in the image frames and makes it difficult to classify target objects and background. In this paper, we propose an efficient MOD algorithm that can cope with moving camera environments. In addition, we present a hardware design and implementation results for the real-time processing of the proposed algorithm. The proposed moving object detector was designed using hardware description language (HDL) and its real-time performance was evaluated using an FPGA based test system. Experimental results demonstrate that our design achieves better detection performance than existing MOD systems. The proposed moving object detector was implemented with 13.2K logic slices, 104 DSP48s, and 163 BRAM and can support real-time processing of 30 fps at an operating frequency of 200 MHz.
In the detection of moving objects from vision sources one usually assumes that the scene has been captured by stationary cameras. In case of backing up a vehicle, however, the camera mounted on the vehicle moves according to the vehicle’s movement, resulting in ego-motions on the background. This results in mixed motion in the scene, and makes it difficult to distinguish between the target objects and background motions. Without further treatments on the mixed motion, traditional fixed-viewpoint object detection methods will lead to many false-positive detection results. In this paper, we suggest a procedure to be used with the traditional moving object detection methods relaxing the stationary cameras restriction, by introducing additional steps before and after the detection. We also decribe the implementation as a FPGA platform along with the algorithm. The target application of this suggestion is use with a road vehicle’s rear-view camera systems.
2 April 2007 in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A fully CMOS integrated RF transceiver for ubiquitous sensor networks in sub-gigahertz industrial, scientific, and medical (ISM)-band applications is implemented and measured. The integrated circuit is fabricated in 0.18-mum CMOS technology and packaged in leadless plastic chip carrier (LPCC) package. The fully monolithic transceiver consists of a receiver, a transmitter, and an RF synthesizer with on-chip voltage-controlled oscillator. The chip fully complies with the IEEE 802.15.4 wireless personal area network in sub-gigahertz mode. The cascaded noise figure of the overall receiver is 9.5 dB and the overall transmitter achieves less than 6.3% error vector magnitude for 40 kb/s mode. The chip uses 1.8-V power supply and the power consumption is 25 mW for reception mode and 29 mW for transmission mode
22 December 2008 in IEEE Transactions on Consumer Electronics
To achieve better sound quality and to improve data reception, digital radio mondiale (DRM) offers a worldwide initiative to bring analog amplitude modulation (AM) radio into the digital era. DRM systems use coded orthogonal frequency division multiplexing (COFDM) modulation with a multilevel coding scheme to get high resistance to the multipath padding and interference. The bandwidth of a DRM passband signal is less than 20 kHz and the number of carriers used in orthogonal frequency division multiplexing (OFDM) modulation is relatively small. For this reason, DRM systems use non-power-of-two Fast Fourier Transforms (FFT) for OFDM demodulation, such processing gives way to more speed and power consumption in critical paths in DRM receivers. In this paper, we propose a mixed radix-2n and prime factor FFT algorithm for portable DRM receivers. Using the proposed architecture, we can reduce the processing time and energy consumption compared to conventional digital signal processor (DSP) based DRM receivers.