The Internet of Things (IoT) security is one of the most important issues developers have to face. Data tampering must be prevented in IoT devices and some or all of the confidentiality, integrity, and authenticity of sensible data files must be assured in most practical IoT applications, especially when data are stored in removable devices such as microSD cards, which is very common. Software solutions are usually applied, but their effectiveness is limited due to the reduced resources available in IoT systems. This paper introduces a hardware-based security framework for IoT devices (Embedded LUKS) similar to the Linux Unified Key Setup (LUKS) solution used in Linux systems to encrypt data partitions. Embedded LUKS (E-LUKS) extends the LUKS capabilities by adding integrity and authentication methods, in addition to the confidentiality already provided by LUKS. E-LUKS uses state-of-the-art encryption and hash algorithms such as PRESENT and SPONGENT. Both are recognized as adequate solutions for IoT devices being PRESENT incorporated in the ISO/IEC 29192-2:2019 for lightweight block ciphers. E-LUKS has been implemented in modern XC7Z020 FPGA chips, resulting in a smaller hardware footprint compared to previous LUKS hardware implementations, a footprint of about a 10% of these LUKS implementations, making E-LUKS a great alternative to provide Full Disk Encryption (FDE) alongside authentication to a wide range of IoT devices.

This contribution presents the design and implementation of a SNTP client module suitable for IEC 61850 environments fully done in hardware. The module is able to provide synchronization and accurate time reference within a microsecond with respect to a SNTP server, in a extremely compact, cost-effective and low power device completely implemented in a low grade FPGA chip. Therefore it can be an ideal replacement to expensive computer-based solutions or dedicated GPS receivers in a wide range of industrial applications. This SNTP client is part of a common technological platform for implementing Remote Terminal Units (RTUs) under IEC 61850.

This paper presents HALOTIS, a novel high accuracy logic timing simulation tool, that incorporates a new simulation algorithm based on different concepts for transitions and events. This new simulation algorithm is intended for including the inertial and degradation delay models. Simulation results are very similar to those obtained by electrical simulators, and show a higher accuracy compared to conventional delay models implemented in current logic simulators.

Discrete microprocessor-based equipment is a typical synchronization system on the market which implements the most critical features of the synchronization protocols in hardware and the synchronization algorithms in software. In this paper, a new clock discipline algorithm for hardware implementation is presented, allowing for full hardware implementation of synchronization systems. Measurements on field-programmable gate array prototypes show a fast convergence time (below 10 s) and a high accuracy (1 μs ) for typical configuration parameters.