Wide bandgap (WBG) and ultra-WBG (UWBG) semiconductor devices exhibit superior performance with higher breakdown voltage and lower ON-resistance compared to Si-based devices, rendering them highly competitive in the field of electric energy conversion and communication. Especially, GaN, as one of the representative materials in WBG semiconductors, has progressed to the stage of industrial realization, and the new generation of UWBG semiconductors such as Ga₂O₃ has become a popular research focus in the last decade for power electronics applications. However, the primary challenge faced by these advanced semiconductor devices is thermal management, particularly in high-power application, which leads to a serious degradation in electrical performance and long-term reliability. Therefore, there is an urgent need for effective thermal management technologies. This review comprehensively summarizes recent advances in device-level thermal management techniques for WBG and UWBG semiconductors, ranging from internal device structure optimization to a series of external strategies for enhancing thermal diffusion. These strategies include enhancing the internal thermal dissipation through device architecture optimization, substrate thinning, high thermal conductivity substrate bonding and coverage, flip chip package, active method of microchannel cooling, and transient thermal management techniques. Finally, we discuss the existing technical challenges, potential solutions, and further development opportunities in thermal management techniques, with the aim of addressing the critical thermal dissipation issue to facilitate the further industrialization of WBG and UWBG semiconductors.

In this letter, more than 3000 V reverse blocking Schottky-drainAlGaN-channelHEMTs are demonstrated for the first time. By using Schottky drain technology, forward breakdown voltage V _FB (at 10 μA/mm) is improved from 1850~2100 V to 2200~2600 V for LGD = 22μm. Due to the high breakdown electric field of AlGaN material, reverse blocking voltage V _RB (at 10 μA/mm) reaches as high as -1950 ~ -2200 V. For HEMTs with L _GD = 52μm, record high V _FB of >3000V and _VRB of >3000V have been achieved.The leakage current is as low as 6.06 nA/mm at V _DS = -2000 V.

In this article, we demonstrate a novel E-mode HEMT featuring in situ AlN dielectric layer on p-GaN cap layer. Compared with conventional p-GaN gate HEMT, the threshold voltage of in situ AlN/p-GaN gate HEMT shifts from 1.8 to 3.9 V, and the forward gate breakdown voltage is increased from 10.0 to 17.6 V. By considering 10 years’ lifetime at 63% failure level, the maximum applicable gate voltage for AlN/p-GaN gate HEMT reaches a remarkable high value of 12.1 V (E-model), which is much higher than that of 6.1 V for conventional HEMT. In addition, the novel E-mode HEMT exhibits a high ON/OFF ratio of $10^{{9}}$ . Experiments demonstrate that E-mode in situ AlN/p-GaN gate HEMT has great potential in power electronics applications.

In this paper, a high breakdown voltage of more than 2200 V in high-electron-mobility transistors (HEMTs) with AlGaN channel and a novel ohmic/Schottky-hybrid drain contact is achieved, which is the record breakdown voltage ever achieved on AlGaN-channel HEMTs. The fabricated device exhibits a high on/off ratio of $7\times 10^{9}$ and a low subthreshold swing of 64 mV/decade, enabled by the AlGaN channel and wet treatment. Furthermore, it exhibits excellent high-temperature output characteristics and dynamic ${I} _{D}$ – ${V} _{D}$ characteristics. Even though both the AlGaN channel and the ohmic/Schottky-hybrid drain have certain impact on the on-state resistance because of the higher sheet resistance and drain contact resistance, these results indicate the significance and potential of AlGaN-channel HEMTs with a hybrid drain architecture in high-voltage applications.

In this letter, we report on demonstrating high-performance enhancement-mode (E-mode) ${p}$ -channel GaN Fin Field-Effect Transistors (FinFETs) fabricated on a proposed ${p}$ -GaN/AlN/AlGaN epitaxial structure with a low sheet resistance of 14 $\text{k}\Omega / {\unicode{0x25A1}} $ . Benefiting from the 25-nm-wide GaN nanowires channel and tri-gate architecture, high threshold voltage ( ${V}_{\text{TH}}$ ) of −2.2 V and low subthreshold swing ( SS ) of 130 mV/dec were obtained. Meanwhile, owing to the removal of etching damage in the recessed region and the post gate annealing, high drain current density of 18.5 mA/mm and high ${I}_{ \mathrm{\scriptscriptstyle ON}} / I_{ \mathrm{\scriptscriptstyle OFF}}$ ratio of $3\times10$ ⁸ were acquired. The E-mode ${p}$ -channel GaN FinFET fabricated on the reformative epitaxial structure with lower sheet resistance shows the potential to be one step closer to realizing the vision of GaN CMOS technology.

In this work, we have achieved novel lateral enhancement-mode (E-M) and depletion-mode (D-M) $\beta $ -Ga2O3 metal-oxide-semiconductor junction field-effect- transistors (MOS-JFETs) featuring a low gate leakage current ( $\text{I}_{{\text {G}}}$ ) and a large gate swing. Ascribing to the high-quality SiO2 layer above the P-NiO $_{{{\text {X}}}}$ /N-Ga2O3 heterojunction (HJ), the $\text{I}_{G}$ was suppressed for over 6 orders of magnitudes when compared with the heterojunction FET (HJ-FET). An off-state drain current of ~ $10^{-{7}}$ mA/mm was also achieved at elevated temperature (T) up to 200 °C, indicating strong thermal stability of our device. The depletion-mode (D-M) MOS-JFET with source-to-drain spacing ( $\text{L}_{{\text {SD}}}$ ) of $12 ~\mu \text{m}$ demonstrates a breakdown voltage (BV) of 1.32 kV and specific on-resistance ( $\text{R}_{{\text {on},\text {sp}}}$ ) of 4.4 $\text{m}\Omega \cdot $ cm2, delivering a high Baliga’s power figure of merit (PFOM) of 405 MW/cm2. Due to the potential of $\beta $ -Ga2O3 MOS-JFET in power electronics, these findings offer a compel ling pathway for future high-power and high-efficiency systems.