Joel Gak

Prof. Joel Gak

orcid

Research Focus & Metrics

Academic Career Length

19Years (2008-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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4 July 2008 in Analog Integrated Circuits and Signal Processing
Verified
Journal Article
Closed access
PDF file
JGJoel Gak
Joel Gak
MMMatias Miguez
Matias Miguez
MBMartín Bremermann
Martín Bremermann
AAAlfredo Arnaud
Alfredo Arnaud

27 May 2024 in IEEE Design & Test
Verified
Journal Article
Closed access
JMJorge Marin
Jorge Marin
Christian A. RojasChristian A. Rojas
Christian A. Rojas
AWAlan Hjalmar Wilson-Veas
Alan Hjalmar Wilson-Veas
NSNelson Salvador
Nelson Salvador
JGJoel Gak
Joel Gak
AOAlejandro R. Oliva
Alejandro R. Oliva
Open-source tools and PDKs facilitate the design, implementation and silicon validation of integrated circuits, circumventing the traditional barriers associated with this field. Power integrated circuits, conversely, are increasingly relevant in modern systems targeting energy-efficient applications. In this study, the design of a power integrated circuit is examined from the perspective of open-source silicon design, which has recently emerged as a feasible approach for acquiring functional silicon-proven designs with low entry barriers. Utilizing this workflow, we showcase the complete design, simulation, layout, and experimental validation of an integrated multilevel dc-dc converter: specifically, a three-level flying capacitor buck converter. Our system converts 3.3V dc bus levels to 1.8V and below, for a measured peak efficiency of 89.3%. The maximum measured load current is 250mA, using two conversion cores operating in interleaved mode. The system has been implemented in 6.27mm 2 of active area using the Skywater 130nm standard CMOS technology open-source PDK.

3 April 2021 in Analog Integrated Circuits and Signal Processing
Verified
Journal Article
Closed access
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JGJoel Gak
Joel Gak
MMMatias Miguez
Matias Miguez
AAAlfredo Arnaud
Alfredo Arnaud

26 October 2024 in Applied Sciences
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Journal Article
Open access
PDF file
AMAndres Martinez
Andres Martinez
FTFelipe Torres
Felipe Torres
JMJorge Marin
Jorge Marin
Christian A. RojasChristian A. Rojas
Christian A. Rojas
JGJoel Gak
Joel Gak
NCNicolás Calarco
Nicolás Calarco
In this study, we present the design, simulation, and implementation of a DC-DC synchronous buck converter utilizing IISB’s 2 μm 4H-silicon carbide (SiC) complementary metal–oxide–semiconductor (CMOS) technology. The converter is designed to meet the demands of modern integrated circuits, particularly in the field of integrated power management. The SiC technology offers enhanced performance and reliability at high temperatures, making it especially suitable for applications that operate in these conditions, including automotive systems, and aerospace, among others. The power transistors and gate drivers are fully integrated on-chip, optimizing efficiency and minimizing footprint. Additionally, the study contributes to the understanding of SiC technology and its application in integrated circuit design. Simulation results demonstrate a peak efficiency of 86.6% at 120 mA load current and 84.8% at 300 mA load current, showing the converter performance under different operating conditions. Furthermore, at high temperatures (295 °C), the converter achieves an efficiency of 89.6%, demonstrating its robustness and versatility in extreme environments. These findings contribute to the advancement of integrated circuit design and facilitate advancements in more efficient and robust power management solutions.

16 July 2024 in IEEE Transactions on AgriFood Electronics
Verified
Journal Article
Closed access
AAAlfredo Arnaud
Alfredo Arnaud
MMMatias Miguez
Matias Miguez
MAMaría Eugenia Araújo
María Eugenia Araújo
ADAriel Dagnino
Ariel Dagnino
JGJoel Gak
Joel Gak
LSLuis Arturo Soriano
Luis Arturo Soriano
In this work, modeling, simulation, and experimental measurements of a LoRaWAN network aimed at implementing a dense farm-area network (FAN) in the agrifood industry are presented. First, the network is modeled for a farm of the future, with as many sensors as would be useful, for the four main productive chains in Uruguay as a study case: livestock, timber, agriculture, and dairy industries. To this end, a survey of commercial sensors was conducted, a few farms were visited, and managers and partners in agrocompanies were interviewed. A LoRaWAN network with a single gateway was simulated to estimate the efficiency (related to data packets lost), in the case of a 1000 ha cattle field with more than 1500 sensors and some cameras sharing the network. Finally, the network efficiency was measured, using 30–40 LoRa modules @ 915 MHz, transmitting at pseudorandom times to emulate up to thousands of LoRa sensor nodes. The simulated and measured results are very similar, reaching > 92% efficiency in all cases. Sites bigger than 1000 ha on the four main productive chains were also simulated. Additionally, energy consumption and transmission distance measurements of LoRaWAN modules are presented, as well as an overview of the economic aspects related to the deployment of the network to corroborate them fit the requirements of a FAN in the agribusiness.

3 April 2018 in Analog Integrated Circuits and Signal Processing
Verified
Journal Article
Closed access
PDF file
MMMatias Miguez
Matias Miguez
JGJoel Gak
Joel Gak
AAAlfredo Arnaud
Alfredo Arnaud
AOAlejandro Raúl Oliva
Alejandro Raúl Oliva
PJPedro Julián
Pedro Julián