The creation of carbon nanotubes has sparked a paradigm shift in the post-silicon era because of their decent electronic and optical properties. However, interface traps pose an obstacle in the realization of high-performance carbon nanotube field-effect transistors (CNTFETs). Herein, we systematically investigate the C−V characteristics of CNTFETs and propose a small-signal equivalent model to decouple the effects arising from interface traps. Moreover, intrinsic parameters associated with interface traps can be feasibly extracted using this approach. An analytical capacitance model is further developed to be incorporated into the well-established CNTFET virtual source model, and excellent agreement has been achieved between our simulation and the measured results of the as-fabricated MOSCAP. The models developed here help to gain insight into the physical properties of high-κ dielectric interface traps subjected to different processes and inform strategies to achieve high-performance CNTFETs.