Because of the von Neumann bottleneck, neuromorphic networks aimed at in-memory computing, such as brains, are extensively studied. As artificial synapses are essential in neuromorphic networks, a photonic synapse based on slot-ridge waveguides with nonvolatile phase-change materials (PCMs) was proposed and demonstrated in an SOI platform with standard complementary metal-oxide-semiconductor (CMOS) process for a larger weight dynamic range. The change of the optical transmission spectrum of our photonic synapses was about 3.5dB higher than that of primitive synapses, which meant large weight dynamic range and more weight values. A 90.7% recognition accuracy based on our photonic synapses, which was 2.6% higher than that of primitive synapses, was realized for the MNIST handwritten digits recognition task performed by a three-layer perceptron. Besides, because of the nonvolatile nature of PCMs, the weights achieved by our photonic synapses can be stored in situ ensuring a lower consumption in in-memory computing. This framework can potentially achieve a more efficient in-memory computing neuromorphic network in silicon photonics.

Optical neural networks are expected to solve the problems of computational efficiency and energy consumption in neural networks. Herein, we experimentally implemented a 2 × 2 photonic convolutional kernel (PCK) using four on-chip micro-ring resonators (MRRs) and demonstrated feature extraction for images with different convolutional kernels. We trained a simple convolutional neural network model to recognize the MNIST dataset and used our PCK devices for processing in the first convolutional layer, achieving a recognition rate of 91%, which further verified the feasibility of MRRs for convolution operations. In addition to the source, all silicon photonic devices used can be monolithically integrated and feature good scalability, which is important for realizing large-scale, low-cost optical neural networks.

We propose and experimentally demonstrate a vertical fibre interfacing interleaved angled MMI (AMMI) for wavelength division (de)multiplexing (WDM) near 1550 nm. This 6-channel WDM device is composed of two 1 × 3 AMMIs and a Mach-Zehnder interferometer (MZI) with an apodized bidirectional grating acting as both vertical optical coupler and 3-dB power splitter. By thoroughly design the bidirectional gratings, a high coupling efficiency of 72.5% and low return loss of −34 dB is obtained by simulation. The AMMI couplers are designed and optimized using the Eigenmode expansion method. For wavelength matching between the MZI and AMMIs, the circuit simulation model of the interleaved AMMI is built by importing the S-parameter matrices of all the optical components extracted from the physical-level simulations. The device was fabricated using the standard CMOS technology and the feature size is compatible with the 193 nm deep-UV lithography. Experimental results obtained without thermal tuning are in good agreement with the simulation results, the device exhibits a small insertion loss (IL) varies between 3.3 and 4.58 dB (including the grating coupling loss), channel spacing of 6 nm, crosstalk (XT) below −20 dB. To investigate the fabrication tolerance, devices on two different chips are measured individually. The results show good consistency in device performance. Also, the fibre misalignment tolerance of the device is experimentally investigated.

Microring resonators are widely used for both active and passive devices for their small footprint and low- power consumption. However, it is very challenging to achieve precise control of positioning and stability of the resonant wave- length, as the microring is very sensitive to fabrication imperfections and temperature variations. In this paper, we propose and demonstrate a new method of monolithic integration of complementary metal-oxide-semiconductor (CMOS) temperat- ure control circuit and $\text{Si}_3 \text{N}_4$ microring filters for resonant wavelength stabilization. Through CMOS back-end process, $\text{Si}_3 \text{N}_4$ photonic layer is formed vertically above the CMOS circuit chip. Due to the automatic temperature control, the integrated $\text{Si}_3 \text{N}_4$ microring filters are almost immune to environment temperature change. The temperature-dependent wavelength shift (TDWS) is decreased from 21.43 pm/°C to 1.43pm/°C with the environment temperature tuning range from 30 °C to 65 °C.