Leonardo Limongi

Dr. Leonardo Limongi

Power Electronics and Drives Research Group (GEPAE), DEE, Universidade Federal de Pernambuco, Recife 50740-530, Brazil
orcid

Research Focus & Metrics

Academic Career Length

20Years (2007-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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6 January 2011 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
RBRadu Bojoi
Radu Bojoi
Leonardo LimongiLeonardo Limongi
Leonardo Limongi
DRDaniel Roiu
Daniel Roiu
ATAlberto Tenconi
Alberto Tenconi
Power electronic converters are commonly used for interfacing distributed generation (DG) systems to the electrical power network. This paper deals with a single-phase inverter for DG systems requiring power quality features, such as harmonic and reactive power compensation for grid-connected operation. The idea is to integrate the DG unit functions with shunt active power filter capabilities. With this approach, the inverter controls the active power flow from the renewable energy source to the grid and also performs the nonlinear load current harmonic compensation by keeping the grid current almost sinusoidal. The control scheme employs a current reference generator based on sinusoidal signal integrator and instantaneous reactive power (IRP) theory together with a dedicated repetitive current controller. Experimental results obtained on a 4-kVA inverter prototype demonstrate the feasibility of the proposed solution.

31 March 2009 in IEEE Industrial Electronics Magazine
Verified
Journal Article
Closed access
Leonardo LimongiLeonardo Limongi
Leonardo Limongi
RBRadu Bojoi
Radu Bojoi
Giovanni GrivaGiovanni Griva
Giovanni Griva
ATAlberto Tenconi
Alberto Tenconi
The paper is about comparing the performance of digital signal processor-based current controllers for three-phase active power filters.

8 September 2017 in IEEE Transactions on Industrial Electronics
Verified
Journal Article
Closed access
AFArtur M. S. Furtado
Artur M. S. Furtado
Fabrício BradaschiaFabrício Bradaschia
Fabrício Bradaschia
Marcelo CavalcantiMarcelo Cavalcanti
Marcelo Cavalcanti
Leonardo LimongiLeonardo Limongi
Leonardo Limongi
In string photovoltaic (PV) systems, the power-voltage (P-V) characteristic under partial shading conditions (PSC) displays multiple peaks requiring global maximum power point (GMPP) tracking (GMPPT) algorithms to identify the PV array GMPP. Several GMPPT algorithms scan wide voltage tracks to detect the GMPP, even larger than a P-V curve full scan. Moreover, many algorithms have been tested only for simple PSC that lead to three well distinct peaks at most. This paper initially presents a trapezoidal area, called the maximum power trapezium (MPT), in the P-V plane that contains all possible GMPPs for any PSC. Using the MPT and information about the minimum voltage difference between adjacent local peaks, a GMPPT algorithm is proposed, which tracks the GMPP of a string PV array under any severe PSC reducing its voltage track and so its tracking time. Simulation and experimental results show the superior performance of the proposed algorithm, in comparison to the state-of-art algorithms, in terms of tracking time, energy loss, and total voltage track during the search for the GMPP.

1 April 2007
Verified
Conference Paper
Closed access
Leonardo LimongiLeonardo Limongi
Leonardo Limongi
RBRadu Bojoi
Radu Bojoi
CPC. Pica
C. Pica
FPF. Profumo
F. Profumo
ATA. Tenconi
A. Tenconi
This paper presents an analysis and comparison of phase locked loop techniques used in grid utility applications to find the voltage vector angle generated from the supply voltages. The phase locked loop (PLL) has a wide range of applications as distributed generation (DG), flexible AC transmission systems (FACTS), static VAR compensators, cycloconverters, active power filters (APF's) and others systems connected to the utility. The performance of these systems in grid connected applications is strongly influenced by the adopted PLL strategy. For this reason, the goal of the proposed paper is to present a comparison of different PLL-based techniques for utility applications to indicate the appropriate solution dedicated to a specific application. The criteria to compare the phase locked loops techniques is the performance under distorted and unbalanced supply voltages.

20 November 2009 in IEEE Transactions on Industry Applications
Verified
Journal Article
Closed access
DRDaniel Roiu
Daniel Roiu
RBRadu Bojoi
Radu Bojoi
Leonardo LimongiLeonardo Limongi
Leonardo Limongi
ATAlberto Tenconi
Alberto Tenconi
A new stationary frame control scheme for three-phase pulsewidth-modulation (PWM) rectifiers operating under unbalanced voltage dips conditions is proposed in this paper. The proposed control scheme regulates the instantaneous active power at the converter poles to minimize the harmonics of the input currents and the output voltage ripple. This paper's novelty is the development of a new current-reference generator implemented directly in stationary reference frame. This allows using proportional sinusoidal signal integrator (P-SSI) controllers for simultaneous compensation of both positive and negative current sequence components. No phase-locked loop (PLL) strategies and coordinate transformations are needed for the proposed current-reference generator. Experimental results are presented for a 20-kV A alternative current (ac)/direct current (dc) converter prototype to demonstrate the effectiveness of the proposed control scheme. A comparison with two other existing control techniques is also performed. Fast dynamic performance with small dc-link voltage ripple and input sinusoidal currents are obtained with this control scheme, even under severe voltage dips operating conditions.

26 July 2012 in IEEE Transactions on Industrial Electronics
Verified
Journal Article
Closed access
PNPaulo S. B. Nascimento
Paulo S. B. Nascimento
Leonardo LimongiLeonardo Limongi
Leonardo Limongi
HSHelber E. P. de Souza
Helber E. P. de Souza
Francisco NevesFrancisco Neves
Francisco Neves
Fundamental-frequency and harmonic positive- and negative-sequence components detection is an important task for implementing power converters for renewable energy systems, uninterruptible power supplies, active power filters, dynamic voltage restorers, and also for power systems protection relays. Detection techniques of this kind are generally implemented in digital signal processor (DSP) with the execution time limited by the sampling period. The computational effort of the control algorithm can considerably increase the execution time, due to the sequential nature of processing in DSP. A promising technique for sequence components separation of three-phase signals is the so called the generalized delayed signal cancelation-phase locked loop (GDSC-PLL). Field programmable gate array's (FPGA's) capacity of exploring the parallelism of operations present in the GDSC-PLL is demonstrated in this paper through the mapping of this technique directly in hardware, allowing for a much shorter execution time than in DSP. The proposed architecture is presented, and the efficient detection of the fundamental-frequency positive-sequence with FPGA is demonstrated, with the obtained results compared with a traditional DSP implementation. In particular, the advantages and possibilities of the use of FPGA are demonstrated in comparison with the DSP. For this comparison, a metric for evaluating the capacity of complexity increase in application algorithms is proposed.