This work analyses the physics of active trap states impacted by hydrogen (H) and nitrogen (N) dopings in amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) and investigates their effects on the device performances under back-gate biasing. Based on numerical simulation and interpretation of the device transfer characteristics, it is concluded that the interface and bulk tail states, as well as the 2+ charge states (i.e., acceptors V_O²⁺) related to oxygen vacancy (V_O), are neutralized by the H/N dopants incorporation via an experimental plasma treatment. Moreover, the simulation reveals that an acceptor-like defect V_OH has been induced by the H doping, to support the observed additional degradation of device subthreshold slope. Superior stability of the optimized a-IGZO TFTs under a proper amount of H/N doping is demonstrated by the decreased density of V_O-related defects in simulation, where hole (V_O⁰ donor) and electron trapping (O_i acceptor) occurs during the negative or positive bias stresses. This work benefit lies in an in-depth systematic understanding and exploration of the effects of the incorporation of the H and N dopants into the a-IGZO film for the TFTs improvement and optimization.

The effect of device fabrication processing conditions is often overlooked in the evaluation of the contact resistance in metal–graphene contact. In this work, we investigate the Ti–graphene contact resistance theoretically and experimentally. A compact model has been proposed to reveal and evaluate the role of different factors in controlling the value of contact resistance. A layer of oxidized Ti or polymer residues at the Ti–graphene interface has been considered to explain the reduced carrier transmission probability through the interface. Experimental results report a low contact resistance as small as 271.45 $\Omega ~\cdot \mu \text{m}$ and our model agrees with the measured values. The proposed model explains the large variation of the contact resistance reported in the literature up to date and help to improve metal–graphene contact for future applications.

A lateral P–I–N photodiode consisting of a monolayer graphene gate based on the silicon-on-insulator (SOI) process for blue and ultraviolet wavelengths is proposed. The introduced gate increases the depletion area with a small gate bias voltage. Owing to the extraordinary optical and electrical properties of graphene, the gated structure shows an improved quantum efficiency over the conventional “ungated” structure. Moreover, the employment of graphene is mainly compatible with modern integrated circuit processes and makes the proposed device suitable for future integration.