In the literature, many studies on stability analysis of dc microgrids have been conducted. However, most of them mainly focus on small-signal stability. On the other hand, few works analyze large-signal stability, but the major part of these works is based on a single unit or a simple cascaded system as a case study. Different from those, this article aims to address the large-signal stability analysis of a dc microgrid from a system-level perspective. First, the equivalent model of a droop-controlled dc microgrid is developed. Subsequently, the Lyapunov-based large-signal stability analysis and the stability criterion are derived, and mixed potential theory is used to make comparisons to verify the effectiveness of the derived criterion. The equilibrium point stability for different operation stages was obtained by means of theoretical calculation. Furthermore, the instabilities principle as well as their physical interpretation is revealed. In this article, the bus voltage is used as the only index to assess the microgrid power balance. Hence, the power load limit can be obtained by taking into consideration the stability and voltage deviation constraints. Finally, simulation and experimental results from a four-converter dc microgrid system verify the feasibility of the proposed theoretical analysis.

This article brings forward a design method of virtual resistance for droop-controlled dc microgrids (DCMGs). Although droop control is widely employed in coordinated DCMGs to coordinate different energy sources, few works address thoroughly the principles for a proper virtual resistance design. In this article, dynamic stability and static voltage deviation constraints are taken into consideration as the main criteria to be complied with by the virtual resistance design. In critical cases, constant power loads (CPLs) may substantially decrease system damping and adversely affects the stability of the system. In this sense, the large-signal stability model is developed including CPLs by using the Lyapunov function, and it is subsequently analyzed to infer the stability criterion. Theoretically, bus voltage is the most important index when addressing the DCMG control; hence, the impact of virtual resistance on the voltage deviation is explored as well. The research presented in this article finds out that virtual resistance influence on system stability is opposite to that on voltage deviation; thus, a tradeoff method based on the containment principle is developed. Throughout the proposed compromised design, we can adjust the weight coefficient to satisfy different performance requirements of DCMGs. The effectiveness of the proposed scheme is validated through experimental results.

Virtual impedances are often used in droop-controlled paralleled-voltage-sourced inverters (VSIs) to achieve proper power sharing. However, different and unknown output impedances of VSIs will affect the power decoupling and power sharing performances. To solve this problem, this paper proposes a novel controller for VSIs by using a disturbance observer (DOB). The DOB is adopted to observe the output currents of VSIs without any extra current sensors. On the one hand, the observed currents are fed forward to the output of voltage compensators, thereby the output impedances of VSIs are eliminated. On the other hand, the observed currents are introduced into the virtual complex impedance loops, which not only reconstructs the impedances of VSIs but also realizes the proper power sharing. Besides, to improve the reactive power sharing accuracy, a synchronization control is proposed to strictly synchronize the VSIs only by using local measurements. Each VSI operates at a constant frequency, so the inherent frequency deviation of the traditional droop control is eliminated. A universal parameter design method is also presented based on the detailed discussion of system stability and voltage quality. Finally, simulation and experimental results clearly validate the proposed control scheme and the parameter design method.

The capacitor condition monitoring is an important issue for the reliable operation of modular multilevel converters (MMCs) in high-voltage applications. The numerous capacitors make the monitoring for the capacitor condition complex and computation-consuming. This paper proposes a hierarchic capacitor condition monitoring strategy to assure the reliability of high-voltage MMCs. In the strategy, the switching times of the switching signals are counted to detect the condition of the capacitor in each submodule (SM). Then, the subsequent capacitance calculation method is only conducted to the abnormal capacitors indicated by the above condition detection algorithm. Meanwhile, the variations of the measured and reference capacitor voltages are employed to calculate the capacitance in the proposed method. The condition detection algorithm shrinks the scope where the abnormal capacitors locate, which avoids calculating the total capacitances in MMCs. In the proposed capacitance calculation method, the complex operations are further saved. Both the two measures reduce the computation burden effectively. The implementation of the whole monitoring strategy is simple and fit for high-voltage MMCs. Moreover, the strategy has no adverse influence on the normal operation of MMCs. The effectiveness of the proposed strategy is verified by the simulation studies with the professional tool Matlab/Simulink.

This paper proposes a new submodule (SM) capable of fault tolerance. This SM integrates an operating half-bridge SM (HBSM) and a backup HBSM inside. The two HBSMs are connected by an intermediate unit, which contains a power switch and a bypass switch. In normal operation, the two HBSMs are conditionally connected in parallel. The structure can well charge the capacitor in the backup HBSM, which avoids the tedious charging before initiating fault tolerance. Different faults are considered with the proposed SM. The faults inside the proposed SM are tolerated by the backup HBSM. To tolerate the faults outside the proposed SM, the two HBSMs become cascaded. After the fault tolerance starts, enough output voltage levels and the symmetry of two arms in the same phase-leg can be ensured in the post-fault operation. With the proposed SM, the fault-tolerant method (FTM) is very simple and handles the drawbacks of the existing FTMs based on hot-reserved SMs and cold-reserved SMs. The performances of the proposed SM and related method are verified by the simulation and experimental results.

Converters with grid-forming (GFM) control are actively involved in the establishment and regulation of grid voltage and frequency in modern power systems. However, the nonlinearity of the converter system complicates the transient stability analysis, especially considering the GFM converter employs current-limiting control, which increases the difficulty of analyzing the transient process during grid faults. In this paper, the transient stability of GFM converter is studied based on the Hamiltonian theory which alleviates the analytical difficulties caused by system nonlinearity, and the current-limiting switching process with its impact on stability of the GFM converter are especially analyzed. Firstly, the dynamic model of the GFM converter is constructed according to Hamiltonian theory, and the system energy function before and during the current-limiting mode is constructed. The process of current-limiting switching under different fault conditions is analyzed, considering the mapping relationship of the current-limiting switching process corresponding to the power angle characteristics. Then, the effects of different parameters on the system stability margin and grid strength are considered. Finally, the correctness and accuracy of the current-limiting process and stability margin analysis are verified using the MT6040 real-time simulator with StarSim-HIL.