A digital closed-loop system design of a microelectromechanical systems (MEMS) disk resonator gyroscope (DRG) is proposed in this paper. Vibration models with non-ideal factors are provided based on the structure characteristics and operation mode of the sensing element. The DRG operates in force balance mode with four control loops. A closed self-excited loop realizes stable vibration amplitude on the basis of peak detection technology and phase control loop. Force-to-rebalance technology is employed for the closed sense loop. A high-frequency carrier loaded on an anchor weakens the effect of parasitic capacitances coupling. The signal detected by the charge amplifier is demodulated and converted into a digital output for subsequent processing. Considering compatibility with digital circuits and output precision demands, a low passband sigma-delta (ΣΔ) analog-to-digital converter (ADC) is implemented with a 111.8dB signal-to-noise ratio (SNR). The analog front-end and digital closed self-excited loop is manufactured with a standard 0.35 µm complementary metal-oxide-semiconductor (CMOS) technology. The experimental results show a bias instability of 2.1 °/h and a nonlinearity of 0.035% over the ± 400° full-scale range.

Sigma-delta (ΣΔ) closed-loop operation is the best candidate for realizing the interface circuit of MEMS accelerometers. However, stability and reliability problems are still the main obstacles hindering its further development for high-end applications. In situ self-testing and calibration is an alternative way to solve these problems in the current process condition, and thus, has received a lot of attention in recent years. However, circuit methods for self-testing of ΣΔ closed-loop accelerometers are rarely reported. In this paper, we propose a fifth-order ΣΔ closed-loop interface for a capacitive MEMS accelerometer. The nonlinearity problem of the system is detailed discussed, the source of it is analyzed, and the solutions are given. Furthermore, a built-in self-test (BIST) unit is integrated on-chip for in situ self-testing of the loop distortion. In BIST mode, a digital electrostatic excitation is generated by an on-chip digital resonator, which is also ΣΔ modulated. By single-bit ΣΔ-modulation, the noise and linearity of excitation is effectively improved, and a higher detection level for distortion is easily achieved, as opposed to the physical excitation generated by the motion of laboratory equipment.

The EM- $\Sigma \Delta$ (electromechanical sigma-delta) approach is a concise and efficient way to realize the digital interface for micro-electromechanical systems (MEMS) accelerometers. However, including a fixed MEMS element makes the synthesizing of the EM- $\Sigma \Delta$ loop an intricate problem. The loop parameters of EM- $\Sigma \Delta$ can not be directly mapped from existing electrical $\Sigma \Delta$ modulator, and the synthesizing problem relies an experience-dependent trail-and-error procedure. In this paper, we provide a new point of view to consider the EM- $\Sigma \Delta$ loop. The EM- $\Sigma \Delta$ loop is analyzed in detail from aspects of the signal loop, displacement modulation path and digital quantization loop. By taking a separate consideration of the signal loop and quantization noise loop, the design strategy is made clear and straightforward. On this basis, a discrete-time PID (proportional integral differential) loop compensator is introduced which enhances the in-band loop gain and suppresses the displacement modulation path, and hence, achieves better performance in system linearity and stability. A fifth-order EM- $\Sigma \Delta$ accelerometer system was designed and fabricated using 0.35 $\mathsf{\mu }\mathrm{m}$ CMOS-BCD technology. Based on proposed architecture and synthesizing procedure, the design effort was saved, and the in-band performance, linearity and stability were improved. A noise floor of 1 $\mathsf{\mu }\mathrm{g}/\sqrt{\mathrm{Hz}}$ , with a bandwidth 1 kHz and a dynamic range of 140 dB was achieved.