Large-scale solar photovoltaic (PV) systems encounter unpredictable partial shaded conditions (PSC). PSC, causing multiple peaks in the power-voltage (P–V) characteristics, potentially downgrades the performance of the PV system. However, the PV system should be operated at global maximum power point (GMPP) for its efficient utilization. For the tracking of GMPP, a scheme based on Flying Squirrel Search Optimization (FSSO) is proposed in this work. For an effective adoption with much reduced convergence time, the original FSSO is modified to update the squirrel position without the presence of predator. An experimental investigation of the proposed scheme is carried out employing a quasi-Z-source converter for the extraction of maximum power under PSC. The proposed scheme yields higher tracking efficiency, non-oscillatory steadystate response, and lower transients. Simulation and experimental investigations under various shading patterns indicate that the proposed strategy outperforms other popular maximum power point tracking (MPPT) strategies based on Perturb & Observe (P&O), Particle Swarm Optimization (PSO), and Grey Wolf Optimization (GWO).

Switched capacitors (SCs)‐based modules are being increasingly used for multilevel DC to AC power conversion, especially for low input voltage applications. Many of these topologies operate in two stages involving H‐bridge switches, which endure high‐voltage stress. The SC 9‐level module (SC9LM) presented here operates in a single stage with one DC source and two capacitors. In addition, the peak inverse voltage of all power switches is confined to the voltage of the input DC source. The proposed 9‐level module ensures a reduced number of power switches. In addition, with appropriate utilisation of states, two of the eleven switches in the module operate at fundamental switching frequency, thereby minimising the switching losses. A single SC9LM achieves a voltage gain of two. The proposed module is validated through circuit analysis followed by simulation and experimental results.

Multilevel inverters (MLIs) are rapidly acquiring techno‐economic feasibility for both high‐power and medium‐power applications. Increased number of power switches has been cited as one of the most important limitations of MLIs; and to overcome it, a whole new class of MLI topologies has come up. These topologies are commonly called ‘reduced device count’ MLIs (RDC‐MLIs). As the number of controlled switches is significantly reduced in RDC‐MLIs, the redundant states are also reduced. Hence, the possibility of fault tolerant operation is severely affected. This study looks at the possibility of imparting fault‐tolerant characteristics to RDC‐MLIs. In this study, some of the recently proposed RDC‐MLI topologies are first analysed for the possibility of fault tolerant operation in the case of ‘any single switch open‐circuit fault (ASSOF)’. Thereafter, an optimal addition of power switch is proposed which enables fault tolerant operation in the event of ASSOF. Furthermore, these modified RDC‐MLIs are verified under normal and faulty conditions using software simulations and experimental set‐ups and these results are presented.

Reliability and large number of components are major challenges for multilevel inverters being used in many industrial applications. These inverters may face situations like failure of power switches, which, in turn, can cause severe damage to other equipment of the system. Hence, it is important these inverters are fault-tolerant. In this article, some of the recently proposed reduced device multilevel inverter (RD-MI) topologies are considered and analyzed in light of imparting open circuit fault-tolerance capability. In RD-MIs, the occurrence of faults would cause a shutdown of the system due to the lack of redundant switching states. However, for the cases involving “any single open-switch failure (SOSF),” the system can continue to operate uninterrupted by imparting fault-tolerant (FT) feature to the RD-MIs. With the proposed solution, the complete system shutdown can be avoided, thereby achieving higher reliability. In this work, two RD-MIs are chosen to demonstrate the proposed approach. Further, the proposed FT RD-MIs based on suggested FT strategy under the healthy and abnormal modes are simulated using MATLAB/Simulink software. The obtained simulation results are experimentally validated.

Safety–critical applications rely heavily on multilevel inverters. This article introduces a fault tolerant (FT) multilevel inverter sustaining an uninterrupted operation with an open switch fault occurred in a single and multiple power switches. Power semiconductor devices used in dc-ac converters increased in numbers to obtain high-quality voltage waveform which makes them vulnerable to failure. As a result, reliability is one of the biggest challenges in the utilization of multilevel inverters (MLIs) in many industrial applications. At the same time, reduced component multilevel inverters can achieve the highest resolution in output voltage waveform by compromising significant features (such as fault tolerance ability, charge balance control, etc.) but it is required to be preserved. For effective fault tolerant operation of MLIs, redundant switching states have given the highest priority in terms of switch level failures. A study is being undertaken to develop a novel fault-tolerant MLI, in the event of an open circuit fault on single and multiple switches. Therefore, the proposed FT-MLI structure can fulfill the operational requirement for a time being and claimed to be reduced components. A valid fault tolerant switching technique along with appropriate fault clearance is employed to obtain the desirable output voltage waveforms. In order to determine the feasibility of FT-MLI, performance evaluations are carried out based on results obtained under normal and abnormal operating conditions through the use of a laboratory prototype.