The low-bandgap engineering and line-tunneling architecture are the two major techniques to resolve the ON-current issues of tunnel field-effect transistors (TFETs). This paper elucidates the design and modeling of line-tunneling TFETs using low-bandgap materials. Three semiconductors, Ge, InAs, and InSb, are considered as examples to explore their physical operations and analytical models. 2-D device simulations were performed to examine the on/off characteristics. The appropriate operational voltages depend on the associated bandgap of semiconductors. The gate voltage should be larger than the bandgap voltage (E _g /q) to ensure high ON-currents, whereas the drain voltage must be less than the bandgap voltage to control OFF-leakages. Because the minimum tunnel path has a key function in determining the tunneling in line-tunneling TFETs, the tunneling current is reformulated in terms of the minimum tunnel path with friendly compact forms. Two prime design factors, the source concentration and gate-insulator thickness, are examined both analytically and numerically, showing the minimum tunnel path can serve as a useful indicator for low-bandgap line-tunneling TFETs.

A novel multilevel Schottky barrier nonvolatile nanowire memory is experimentally reported with low-voltage operations and excellent reliability. Using efficient hot-electrons and hot-holes generation associated with Schottky barrier source/drain, the multilevel schemes of silicon nanowire silicon-oxide-nitride-oxide-silicon (SONOS) cells are achieved at adequately low gate voltages. The n-channel cells work at a small gate voltage of 5 to 7 V using multilevel electron programming, whereas the p-channel cells operate at a low gate voltage of -7 to -11 V using multilevel hole programming. The roles of electron and hole carriers in the n-channel cells are exchanged in the p-channel nanowire cells because of ambipolar conduction. Both the n- and p-channel multilevel Schottky barrier nanowire SONOS cells preserve excellent thermal retention and cycling endurance for use in practical embedded and stand-alone nonvolatile memories.