Byung-Gook Park

Byung-Gook Park

orcid

Research Focus & Metrics

Academic Career Length

30Years (1997-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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8 November 2017 in ACS Applied Materials & Interfaces
Verified
Journal Article
Closed access
Sungjun KimSungjun Kim
Sungjun Kim
HKHyungjin Kim
Hyungjin Kim
SHSungmin Hwang
Sungmin Hwang
MKMin-Hwi Kim
Min-Hwi Kim
Yao-Feng ChangYao-Feng Chang
Yao-Feng Chang
BPByung-Gook Park
Byung-Gook Park

27 November 2018 in Nanoscale
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Journal Article
Closed access
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Sungjun KimSungjun Kim
Sungjun Kim
JCJia Chen
Jia Chen
YCYingChen Chen
YingChen Chen
MKMin-Hwi Kim
Min-Hwi Kim
HKHyungjin Kim
Hyungjin Kim
BPByung-Gook Park
Byung-Gook Park
Homeothermic synaptic behaviors with a wide range of temperature were demonstrated in CMOS-compatible HfO x /AlO y memristors.

27 February 2019 in IEEE Transactions on Electron Devices
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Journal Article
Closed access
JKJang Hyun Kim
Jang Hyun Kim
SKSangwan Kim
Sangwan Kim
BPByung-Gook Park
Byung-Gook Park
This paper examines a tunnel field-effect transistor (TFET) as a promising device for achieving steeper switching and better electrical performances in low-power operation. It features a double-gate TFET with vertical channel sandwiched by lightly doped Si (VS-TFET). The vertical tunnel junction is employed on the source side for the steeper subthreshold swing (SS) and for the higher on-current (Ion) by restricting tunnel barrier width. The VS-TFET shows 17-mV/dec minimum SS and 10⁴ on/ off current ratio (Ion/Ioff) for sub-0.7-V gate overdrive. In addition, the VS-TFET shows sub-60-mV/dec SS in a wide range of ID regardless of sweep directions. In conclusion, the work presented here demonstrates that the VS-TFET will be one of the most promising candidates for a next-generation low-power device.

17 April 2018 in Small
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Journal Article
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Sungjun KimSungjun Kim
Sungjun Kim
SJSunghun Jung
Sunghun Jung
MKMin‐Hwi Kim
Min‐Hwi Kim
YCYing‐Chen Chen
Ying‐Chen Chen
YCYao‐Feng Chang
Yao‐Feng Chang
BPByung-Gook Park
Byung-Gook Park

27 February 2018 in IEEE Electron Device Letters
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Journal Article
Closed access
Hyungjin KimHyungjin Kim
Hyungjin Kim
SHSungmin Hwang
Sungmin Hwang
JPJungjin Park
Jungjin Park
SYSangdoo Yun
Sangdoo Yun
JLJong-Ho Lee
Jong-Ho Lee
BPByung-Gook Park
Byung-Gook Park
We demonstrate the hardware implementation of spiking neural network (SNN) with synaptic transistors and neuron circuits. The method of conversion from software fully-connected network (FCN) to hardware SNN with little degradation is discussed. The degradation of classification accuracy is analyzed in terms of device variation and noisy images. In addition, the accuracy degradation is significantly improved by stacking denoising autoencoder (DAE) layer. FCN-SNN conversion with very little performance drop is demonstrated using weight normalization, and SNN with DAE layer shows a great tolerance to input image noise.

26 January 2016 in IEEE Electron Device Letters
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Journal Article
Closed access
HKHyungjin Kim
Hyungjin Kim
JPJungjin Park
Jungjin Park
MKMin-Woo Kwon
Min-Woo Kwon
JLJong-Ho Lee
Jong-Ho Lee
BPByung-Gook Park
Byung-Gook Park
A new synaptic transistor was fabricated with two separated gates based on a FinFET structure in order to mimic short- and long-term memories in a biological synapse and connect with a postsynaptic neuron circuit directly. The transition between short- and long-term memories occurred after applying repetitive input pulses and strongly depended upon intervals between input pulses. These findings indicate that it has very similar learning characteristics with a biological synapse and the possibility as a synaptic device in neuromorphic systems.