This paper examines a tunnel field-effect transistor (TFET) as a promising device for achieving steeper switching and better electrical performances in low-power operation. It features a double-gate TFET with vertical channel sandwiched by lightly doped Si (VS-TFET). The vertical tunnel junction is employed on the source side for the steeper subthreshold swing (SS) and for the higher on-current (Ion) by restricting tunnel barrier width. The VS-TFET shows 17-mV/dec minimum SS and 10⁴ on/ off current ratio (Ion/Ioff) for sub-0.7-V gate overdrive. In addition, the VS-TFET shows sub-60-mV/dec SS in a wide range of ID regardless of sweep directions. In conclusion, the work presented here demonstrates that the VS-TFET will be one of the most promising candidates for a next-generation low-power device.
We demonstrate the hardware implementation of spiking neural network (SNN) with synaptic transistors and neuron circuits. The method of conversion from software fully-connected network (FCN) to hardware SNN with little degradation is discussed. The degradation of classification accuracy is analyzed in terms of device variation and noisy images. In addition, the accuracy degradation is significantly improved by stacking denoising autoencoder (DAE) layer. FCN-SNN conversion with very little performance drop is demonstrated using weight normalization, and SNN with DAE layer shows a great tolerance to input image noise.
A new synaptic transistor was fabricated with two separated gates based on a FinFET structure in order to mimic short- and long-term memories in a biological synapse and connect with a postsynaptic neuron circuit directly. The transition between short- and long-term memories occurred after applying repetitive input pulses and strongly depended upon intervals between input pulses. These findings indicate that it has very similar learning characteristics with a biological synapse and the possibility as a synaptic device in neuromorphic systems.