This paper addresses the performance of the bidirectional dual active bridge (DAB) converter. One of the advantages of the DAB is the possibility to achieve the zero-voltage switching (ZVS) operation in all the switches of this converter. However, the ZVS operation range can be lost for light loads, especially if high voltage is required in at least one of the DAB ports and the phase-shift control is used to regulate the power processed by the converter. Theoretically simple averaged and small-signal models are presented for the DAB converter. Using the study presented in this paper, the boundaries of the ZVS operation can be easily evaluated. The proposed models and analysis of the ZVS boundaries allow the proposal and evaluation of two different design strategies with different purposes: on the one hand, increasing the ZVS operation range and, on the other, improving efficiency at full load. Moreover, some techniques are presented for increasing the ZVS operation range and improving the efficiency of the DAB at full load (both using phase-shift control) employing the aforementioned analysis to obtain certain design criteria and conclusions. Finally, the proposed models, design strategies, and techniques to improve the performance of the DAB are experimentally tested using a 1-kW prototype with input and output voltages of 48 and 400 V, respectively.

The increase demand of an intermediate storage of electrical energy in battery systems, in particular due to the use of renewable energy, has resulted in the need of bidirectional DC/DC power converters with galvanic isolation. Uninterruptible Power Supplies (UPS), battery charging systems, photovoltaic equipment and auxiliary power supplies in traction applications are examples of some fields of application of this kind of converters. A Dual Active Bridge (DAB) bidirectional DC/DC converter is a topology with the advantages of decreased number of devices, soft-switching commutations, low cost, and high efficiency. The use of this topology is proposed for applications where the power density, cost, weight, and reliability are critical factors. In the present paper the steady-state analysis of the converter has been carried out, giving some guidelines for the design (considering soft switching limits and the amount of reactive current) and a small-signal model of the topology. Simulations and experimental results are also presented.

The piecewise linear model has traditionally been used to calculate switching losses in switching mode power supplies due to its simplicity and good performance. However, the use of the latest low voltage power MOSFET generations and the continuously increasing range of switching frequencies have made it necessary to review this model to account for the parasitic inductances that it does not include. This paper presents a complete analytical switching loss model for power MOSFETs in low voltage switching converters that includes the most relevant parasitic elements. It clarifies the switching process, providing information about how these parasitics, especially the inductances, determine switching losses and hence the final converter efficiency. The analysis presented in this paper yields two different types of possible switching situations: capacitance-limited switching and inductance-limited switching. This paper shows that, while the piecewise linear model may be applied in the former, the proposed model is more accurate for the latter. Carefully-obtained experimental results, described in detail, support the analytical results presented.

High-brightness LEDs are considered remarkable lighting devices due to their high reliability, chromatic variety, and increasing efficiency. As a result, a high number of solutions for supplying LED strings are emerging. One-stage solutions are cost-effective, but their efficiency is low because they have to fulfill several purposes with only one converter: power factor correction (PFC), galvanic isolation (in some cases), and current regulation. Two-stage and three-stage solutions have higher efficiency because each stage is optimized for only one or two tasks and they are the preferred options when supplying several strings at the same time. In this paper, a two-stage solution is proposed. The first stage is the well-known PFC boost converter. The second stage, on which this paper is focused, is the asymmetrical half bridge (AHB). Its design has been optimized based on the needs and characteristics of LED-based street lighting applications. The proposed transformer design (with asymmetrical secondary windings) minimizes the conduction losses while the model of the converter during the dead times optimizes their duration, reducing switching losses in the MOSFETs and diodes. Experimental results obtained with a 40-W prototype show an efficiency as high as 94.5% for this second stage and validate the proposed design procedure and model.

This article presents an in-depth analysis of all electric-aircraft (AEA) architectures. This work aims to provide a global vision of the current AEA state of the art, to estimate the main technological gaps and drivers, and to identify the most promising architecture configuration for future electrical aircraft in the context of a twin-propeller 20-MW aircraft. The comparison between architectures is done based on three different figures of merit: reliability, efficiency, and specific power density. The methodology presented and the trade studies are applied to a narrowbody aircraft of 20 MW, equivalent to an Airbus A320, and following current efforts of government agencies to achieve cleaner air mobility within the next two decades.

Active power-factor correctors (PFCs) are needed to design ac-dc power supplies with universal input voltage range and sinusoidal input current. The classical method to control PFCs consists in two feedback loops and an analog multiplier. Hence, the input current is sinusoidal and it is in-phase with the input voltage. However, a bulk capacitor is needed to balance the input and the output power. Due to its high capacitance, an electrolytic capacitor is traditionally used as a bulk capacitor in PFCs. As a consequence, the lifetime of the ac-dc power supply is limited by the electrolytic capacitor's, which becomes insufficient to some applications (e.g., high-brightness LEDs). This paper proposes a reduction of the output voltage ripple (which allows reduction of the output capacitance) by distorting the input current, but maintaining the harmonic continent compatible with EN 61000-3-2 regulations. The limits of this output capacitor reductions are deduced. Also, a control strategy based on a low-cost microcontroller is developed to put the proposed study into practice. Finally, the theoretical results are validated in a 500-W prototype.