Rahimah Mohd Saman

Rahimah Mohd Saman


Research Focus & Metrics

Academic Career Length

16Years (2011-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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17 April 2019 in Applied Sciences
Verified
Journal Article
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RSRahimah Mohd Saman
Rahimah Mohd Saman
SSSharaifah Kamariah Wan Sabli
Sharaifah Kamariah Wan Sabli
MHMohd Rofei Mat Hussin
Mohd Rofei Mat Hussin
MOMuhammad Hilmi Othman
Muhammad Hilmi Othman
MHMuhammad Aniq Shazni Mohammad Haniff
Muhammad Aniq Shazni Mohammad Haniff
MSMohd Ismahadi Syono
Mohd Ismahadi Syono
Graphene’s superior electronic and thermal properties have gained extensive attention from research and industrial sectors to study and develop the material for various applications such as in sensors and diodes. In this paper, the characteristics and performance of carbon-based nanostructure applied on a Trench Metal Oxide Semiconductor MOS barrier Schottky (TMBS) diode were investigated for high temperature application. The structure used for this study was silicon substrate with a trench and filled trench with gate oxide and polysilicon gate. A graphene nanowall (GNW) or carbon nanowall (CNW), as a barrier layer, was grown using the plasma enhanced chemical vapor deposition (PECVD) method. The TMBS device was then tested to determine the leakage current at 60 V under various temperature settings and compared against a conventional metal-based TMBS device using TiSi2 as a Schottky barrier layer. Current-voltage (I-V) measurement data were analyzed to obtain the Schottky barrier height, ideality factor, and series resistance (Rs) values. From I-V measurement, leakage current measured at 60 V and at 423 K of the GNW-TMBS and TiSi2-TMBS diodes were 0.0685 mA and above 10 mA, respectively, indicating that the GNW-TMBS diode has high operating temperature advantages. The Schottky barrier height, ideality factor, and series resistance based on dV/dln(J) vs. J for the GNW were calculated to be 0.703 eV, 1.64, and 35 ohm respectively.

4 October 2011 in Discover Nano
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Journal Article
Open access
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DBDaniel Cs Bien
Daniel Cs Bien
RSRahimah Mohd Saman
Rahimah Mohd Saman
SBSiti Aishah Mohamad Badaruddin
Siti Aishah Mohamad Badaruddin
HLHing Wah Lee
Hing Wah Lee
We report on a process for fabricating self-aligned tungsten (W) nanowires with polycrystalline silicon core. Tungsten nanowires as thin as 10 nm were formed by utilizing polysilicon sidewall transfer technology followed by selective deposition of tungsten by chemical vapor deposition (CVD) using WF6 as the precursor. With selective CVD, the process is self-limiting whereby the tungsten formation is confined to the polysilicon regions; hence, the nanowires are formed without the need for lithography or for additional processing. The fabricated tungsten nanowires were observed to be perfectly aligned, showing 100% selectivity to polysilicon and can be made to be electrically isolated from one another. The electrical conductivity of the nanowires was characterized to determine the effect of its physical dimensions. The conductivity for the tungsten nanowires were found to be 40% higher when compared to doped polysilicon nanowires of similar dimensions.