Hongwei Yue

Hongwei Yue


Research Focus & Metrics

Academic Career Length

8Years (2019-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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16 January 2020 in Electronics
Verified
Journal Article
Open access
PDF file
WXWeilin Xu
Weilin Xu
TWTaotao Wang
Taotao Wang
XWXueming Wei
Xueming Wei
HYHongwei Yue
Hongwei Yue
BWBaolin Wei
Baolin Wei
HLHaiou Li
Haiou Li
The portable real-time electrocardiogram (ECG) is a convenient and promising electronic device for cardiovascular diseases patients. However, unlike wet gel electrodes in traditional clinical applications, dry electrodes are competent for comfortable long-time wearing and can prevent skin ulceration. Its ultra-high source impedance and electrode offset (EOS) make traditional chopper amplifiers with low input impedance and limited EOS range difficult to apply to this area. To overcome these challenges, this paper proposes a novel chopper amplifier topology. This architecture includes a gain control loop, a ripple reduction loop, and a DC-servo loop (DSL). The proposed sampling input stage and digital-analog hybrid DSL are employed to boost input impedance and extend the EOS handing range. Designed with a 0.18 µm 1P6M 1.8 V CMOS salicide process, the proposed chopper capacitively coupled instrumentation amplifier achieves an ultra-high input impedance of 120 GΩ (<0.05 Hz) or 2.1 GΩ (0.6~250 Hz), an EOS handing range of ±325 mV and a low noise of 1.9 μVrms at 0.6~250 Hz. It occupies an area of 0.36 mm2 and only consumes a quiescent current of 11 μA.

15 February 2019 in Electronics
Verified
Journal Article
Open access
PDF file
HYHongwei Yue
Hongwei Yue
XSXiaofei Sun
Xiaofei Sun
JLJunxin Liu
Junxin Liu
WXWeilin Xu
Weilin Xu
HLHaiou Li
Haiou Li
SLSiyu Lin
Siyu Lin
A dual-output voltage reference circuit with two reference voltages of 281 mV (Vref1) and 320.5 mV (Vref2) is presented in this paper. With a novel and precise circuit structure, the proposed circuit, operating in the subthreshold region, integrates two different output voltages into a circuit to form a dual-output voltage reference, and cascode current mirrors are used to enhance the power supply rejection ratio (PSRR). The proposed circuit was designed in a standard 0.18-µm CMOS process and has a series of attractive features: low-temperature coefficient (TC), high-PSRR, low-Line sensitivity (LS), small-chip area and low-power consumption. Monte Carlo simulations for 2000 samples showed that the output voltages 281 mV and 320.5 mV had a variation coefficient of 1.73% and 1.44%, respectively. The minimum power consumption was 84.1 nW at 0.9 V supply, proving that the circuit is suitable for portable biomedical application. The active area of the proposed voltage reference was only 0.0086 mm2.