This paper proposes a new nine-level inverter for mediumand high-power applications. The proposed topology comprises of a three-level (3L) active neutral-point-clamped (ANPC) inverter connected in series with a floating capacitor (FC) fed H-bridge. Besides, two additional switches operating at line frequency are appended across the dc link of the 3L ANPC structure. Compared with conventional hybrid cascaded inverters, the primary advantage of this addition is doubling of the resulting root mean square output voltage. This amelioration is achieved while preserving the standard 3L ANPC and H-bridge structures with minimum topological modification. A simple logic-gate-based voltage balancing scheme is developed to regulate the FC voltage. The proposed voltage balancing method is independent of load power factor, inverter modulation index, and can balance the voltage across FC instantaneously. The step-by-step formulation of logical expressions for the generation of gating pulses is deliberated in detail and can be generalized for any n-level inverter. Further, simulation results as well as the experimental measurements obtained from the laboratory prototype are presented to validate the effectiveness and practicability of the proposed configuration. Finally, the notable merits of the proposed inverter over the prior art topologies is established through a comprehensive comparative study.
8 February 2019 in IEEE Transactions on Power Electronics
This paper describes a novel nine-level inverter based on switched-capacitors (SCs) with quadruple boost ability requiring reduced components. The structure of the proposed topology relies on the series/parallel connection of SCs. It consist of 12 switches and two SCs. As opposed to similar SC-based inverters, the proposed topology does not employ a back-end Hbridge and the voltage stress of all the switches do not exceed twice the input DC voltage. A simple logic-gate based pulseswidth- modulation scheme is developed for gating the switches of the proposed topology. A comprehensive comparison against the state-of-the-art topologies in terms of the required number of components and a detailed cost analysis is performed to attest the outperforming merits of the proposed topology. Finally, various experimental results are presented to validate the feasibility and operability of the proposed topology.
25 December 2018 in IEEE Transactions on Power Electronics
Two-stage boosting multilevel inverters (MLIs) which are highly suitable for photovoltaic power plants are known to suffer because of the high voltage stress on the switches of second stage. One of the ways to confront this issue is through eliminating of the front-end booster. However, this leads to increased structural and control complexity of the resulting integrated boosting capability MLI. This letter presents a single-stage boosting MLI requiring lesser number of switches, diodes and capacitors for renewable power generation applications. It requires nine switches and only one capacitor for five-level voltage generation. The topology has inherent selfbalancing capability, thereby does not need additional balancing circuitry. All the switches of proposed topology withstand an voltage of value equal to the input DC source only and thus exhibits an uniform blocking voltage. A less complicated logicform- equations based gating pulse generation scheme is designed for enabling the proposed MLI to maintain its capacitor voltage. Further, a comparative study with stateof-the-art topologies is carried out to demonstrate the superior performance of the proposed topology. Finally, the feasibility of the proposed topology is validated through experimental tests and the corresponding results are elucidated.
4 December 2017 in IEEE Transactions on Power Electronics
This letter presents an improved sensorless nine-level inverter topology with reduced number of components. It is formed by cascading a three-level T-type neutral clamped point inverter with a floating capacitor (FC) fed two-level converter unit. Additionally, two line-frequency switches are appended across the dc-link. A simple logic-form equations-based pulse width modulator is designed which is in-charge of maintaining the FC voltage at its reference value without any aid of voltage and current sensor. Thus, the complexity in control of the proposed topology is very minimal. The working principle of the proposed inverter and formulation of logic-form equations is deliberated in detail. Furthermore, experimental results obtained from the developed prototype are presented to validate feasibility and operability of the proposed topology. Finally, a comprehensive comparison with some of the recently reported inverter topologies proving the merits of the proposed topology is included.
26 November 2019 in IEEE Transactions on Circuits and Systems II: Express Briefs
This paper presents a novel seven-level (7L) inverter topology for grid-connected renewable applications. It consists of ten active switches and one inner flying-capacitor unit forming a structure similar to conventional active neutral point clamped inverter. The proposed unique arrangement reduces the number of active, passive components and it does not require any sensor to balance the floating capacitor voltage, thereby reduces cost and complexity in the control system design. In addition, compared to major conventional 7L inverter topologies, the proposed topology is capable of boosting the input voltage by a factor of 1.5, thereby, eliminating the need for an intermediate boosting stage. In other words, it reduces the dc-link voltage requirement by 50%. To prove the advantage of the proposed topology over other recent topologies, a comparative study in terms of power components and cost is presented. The operation and performance of the proposed topology for various loading conditions are validated through experimental tests and measurements.
5 March 2019 in IEEE Transactions on Circuits and Systems II: Express Briefs