This letter presents a compact switched capacitor multilevel inverter topology with reduced switch count and with self-voltage balancing and boosting ability. The operational mode of proposed CSCMLI is discussed. A comparative analysis in terms of number of switches and blocking voltages is presented against recent switched capacitor multilevel inverter topologies. Further to enhance the quality of the output voltage, a new level shifted multicarrier PWM modulation technique is recommended. This modulation technique produces low THD and high rms voltage. The proposed modulation technique is implemented in the nine-level CSCMLI with single dc source and two capacitors. The simulated and experimental results are verified for a switching frequency of 50Hz and 2.5 kHz using the proposed PWM control.

In this paper, a new switched capacitor based multilevel inverter topology is proposed. The proposed topology generates seven level (7L) output voltage using a single dc voltage source along with two floating capacitors. The output voltage of the proposed topology is three-times higher than the input voltage (i.e., gain factor of Vin:Vout = 1:3) along with self-voltage balancing of capacitors. The proposed seven level triple voltage gain boost inverter (7L-3GBI) inherently generates a bipolar waveform without backend H-bridge that reduces the total standing voltage of the topology. The practicability of the proposed topology has been demonstrated by having a quantitative and cost comparison with similar topologies. Furthermore, the workability of the proposed 7L topology has been validated through different results taken from a prototype laboratory setup.

This paper describes a novel nine-level inverter based on switched-capacitors (SCs) with quadruple boost ability requiring reduced components. The structure of the proposed topology relies on the series/parallel connection of SCs. It consist of 12 switches and two SCs. As opposed to similar SC-based inverters, the proposed topology does not employ a back-end Hbridge and the voltage stress of all the switches do not exceed twice the input DC voltage. A simple logic-gate based pulseswidth- modulation scheme is developed for gating the switches of the proposed topology. A comprehensive comparison against the state-of-the-art topologies in terms of the required number of components and a detailed cost analysis is performed to attest the outperforming merits of the proposed topology. Finally, various experimental results are presented to validate the feasibility and operability of the proposed topology.

Two-stage boosting multilevel inverters (MLIs) which are highly suitable for photovoltaic power plants are known to suffer because of the high voltage stress on the switches of second stage. One of the ways to confront this issue is through eliminating of the front-end booster. However, this leads to increased structural and control complexity of the resulting integrated boosting capability MLI. This letter presents a single-stage boosting MLI requiring lesser number of switches, diodes and capacitors for renewable power generation applications. It requires nine switches and only one capacitor for five-level voltage generation. The topology has inherent selfbalancing capability, thereby does not need additional balancing circuitry. All the switches of proposed topology withstand an voltage of value equal to the input DC source only and thus exhibits an uniform blocking voltage. A less complicated logicform- equations based gating pulse generation scheme is designed for enabling the proposed MLI to maintain its capacitor voltage. Further, a comparative study with stateof-the-art topologies is carried out to demonstrate the superior performance of the proposed topology. Finally, the feasibility of the proposed topology is validated through experimental tests and the corresponding results are elucidated.