In this work, a mm-Wave vertically-polarized electric dipole array solution for 5G wireless devices is presented. The dipole is fabricated using vias in a standard PCB process to fit at the phone or tablet edges featuring wideband operation with broad half-power beamwidth in the elevation plane (HPBWELEV), high gain and high front-to-back radiation ratio (F/B). For enhanced gain, parasitic-vias are added in front of the dipole as directors. To improve HPBW without sacrificing gain, the directors are implemented as V-shaped bisection parasitic-vias. A via-fence surrounds the dipole structure to suppress back radiation and enhance F/B. The dipole is connected to a parallel-strip line (PS) which is interfaced to the main SIW feed through a novel SIW-to-PS transition. Thorough investigation, optimization, and parametric study are provided for each design parameter of the proposed structure. A single dipole, 2×1, and 4×1 arrays were designed and fabricated showing close agreement between the simulated and measured results. The single-dipole operates over 7.23-GHz bandwidth with stable radiation performance. The 4×1 array achieves HPBWELEV of 133.1∘, F/B of 36.6-dB, cross-polarization less than -39.6-dB and 12.61-dBi gain with 95.8% radiation efficiency. The low cost, compactness, and good performance of the proposed dipole make it a competing candidate for the future 5G mobile devices transceivers.

This paper presents a 65-nm CMOS Nyquist-rate reconfigurable time-based analog-to-digital converter (ADC). The time-domain nature of the ADC allows for efficient hardware reuse and a wide range of reconfigurability. The ADC employs a reconfigurable time-to-digital converter (TDC) that can be configured as a high-resolution 1-ps correlated double sampling SAR-TDC for the high-resolution modes or as a $4\times $ asynchronous time-interleaved flash-TDC for the high sampling rate modes. The Nyquist-rate ADC supports continuous sampling rate variations from 100 MS/s to 5 GS/s providing 13–5-bit resolution with exponential power scaling from 8.4 to 22.3 mW, respectively. A programmable highly linear 1-bit folded voltage-controlled oscillator is employed to provide the appropriate tuning characteristics for different sampling rate modes with high linearity. The ADC linearity is further enhanced using foreground digital calibration achieving figure-of-merit ranging from 14.6 to 196 fJ/conv.

This work presents fence shaping for dipole antenna operating at 5G high-band frequencies. A via fence is employed around the dipole to suppress back radiation. By varying the geometric shape of the fence, the dipole’s radiation characteristics can be controlled, which adds an additional degree of freedom to the design. This was investigated by studying different fence shapes, namely rectangular-, U-, and V-shaped fences. The wide bandwidth (higher than 6.5 GHz) centered around 28 GHz, and the stable radiation performance from 24 GHz to 32 GHz made the proposed structure capable of supporting multiple 5G frequency bands and the fence shaping help modulate the gain and HPBW of the dipole. All fabricated prototypes attained front-to-back radiation ratio (F/B) higher than 36 dB, with good gain/HPBW performances of 14.1 dBi/103.7°, 13.5dBi/118°, and 12.6 dBi/133° from the V-fence, U-fence, and rectangular fence 4 × 1 arrays, respectively.