Yongxun Liu

Dr. Yongxun Liu


Research Focus & Metrics

Academic Career Length

28Years (1999-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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13 November 2006 in IEEE Transactions on Nanotechnology
Verified
Journal Article
Closed access
YLYongxun Liu
Yongxun Liu
SKShinya Kijima
Shinya Kijima
ESEtsuro Sugimata
Etsuro Sugimata
MMMeishoku Masahara
Meishoku Masahara
KEKazuhiko Endo
Kazuhiko Endo
ESEiichi Suzuki
Eiichi Suzuki
The titanium nitride (TiN) gate electrode with a tunable work function has successfully been deposited on the sidewalls of upstanding Si-fin channels of FinFETs by using a conventional reactive sputtering. It was found that the work function of the TiN (phiTiN) slightly decreases with increasing nitrogen (N2) gas flow ratio, RN=N2/(Ar+N2) in the sputtering, from 17% to 100%. The experimental threshold voltage (Vth) dependence on the RN shows that the more RN offers the lower Vth for the TiN gate n-channel FinFETs. The composition analysis of the TiN films with different RN showed that the more amount of nitrogen is introduced into the TiN films with increasing RN, which suggests that the lowering of phi TiN with increasing RN should be related to the increase in nitrogen concentration in the TiN film. The desirable Vth shift from -0.22 to 0.22 V was experimentally confirmed by fabricating n+ poly-Si and TiN gate n-channel multi-FinFETs without a channel doping. The developed simple technique for the conformal TiN deposition on the sidewalls of Si-fin channels is very attractive to the TiN gate FinFET fabrication

4 August 2003 in IEEE Electron Device Letters
Verified
Journal Article
Closed access
YLYongxun Liu
Yongxun Liu
KIK. Ishii
K. Ishii
TTT. Tsutsumi
T. Tsutsumi
MMM. Masahara
M. Masahara
ESE. Suzuki
E. Suzuki
Ultranarrow and ideal rectangular cross section silicon(Si)-Fin channel double-gate MOSFETs (FXMOSFETs) have successfully been fabricated for the first time using [110]-oriented silicon-on-insulator (SOI) wafers and orientation-dependent wet etching. The transconductance (g/sub m/) normalized by 2×(Fin height) is found to be as high as 700 μS/μm at V/sub d/=1 V in the fabricated 13-nm-thick and 82-nm-high Si- Fin channel double-gate MOSFET with a 105-nm gate length and a 2.2-nm gate oxide. The almost-ideal S-slope of 64 mV/decade is demonstrated in a 145-nm gate length device. These excellent results show that the Si-Fin channel with smooth [111]-oriented sidewalls is suitable to realize a high-performance FXMOSFET. The short-channel effects (SCEs) are effectively suppressed by reducing the Si-Fin thickness to 23 nm or less.

6 May 2010 in IEEE Electron Device Letters
Verified
Journal Article
Closed access
Kazuhiko EndoKazuhiko Endo
Kazuhiko Endo
SOShin-Ichi O'Uchi
Shin-Ichi O'Uchi
YIYuki Ishikawa
Yuki Ishikawa
YLYongxun Liu
Yongxun Liu
TMTakashi Matsukawa
Takashi Matsukawa
MMMeishoku Masahara
Meishoku Masahara
Variability of TiN FinFET performance is comprehensively studied. It is found that the variation of the in the FinFET occurs and the standard deviations of the of nMOS and pMOS FinFETs are almost the same. From the analytical results, it is found that the variation of the TiN FinFET is due to the work function variation (WFV) of TiN metal gate. The WFV is also responsible for the on-current variation.

22 May 2014 in IEEE Electron Device Letters
Verified
Journal Article
Closed access
YMYukinori Morita
Yukinori Morita
TMTakahiro Mori
Takahiro Mori
SMShinji Migita
Shinji Migita
WMWataru Mizubayashi
Wataru Mizubayashi
ATAkihito Tanabe
Akihito Tanabe
HOHiroyuki Ota
Hiroyuki Ota
In this letter, we propose a synthetic electric field (SE) effect to enhance the performance of tunnel field-effect transistors (TFETs). The novel SE-TFET architecture utilizes both horizontal and vertical electric fields induced by a gate electrode that is wrapped around an ultrathin epitaxial channel. The drain current of the SE-TFET is increased up to 100 times in comparison with those of conventional TFETs. The subthreshold slope of the SE-TFET also improved, and enhanced to 52 mV/decade by scaling the channel width and channel thickness.

29 May 2007 in IEEE Electron Device Letters
Verified
Journal Article
Closed access
YLYongxun Liu
Yongxun Liu
TMTakashi Matsukawa
Takashi Matsukawa
KEKazuhiko Endo
Kazuhiko Endo
MMMeishoku Masahara
Meishoku Masahara
SOShin-Ichi O'Uchi
Shin-Ichi O'Uchi
ESEiichi Suzuki
Eiichi Suzuki
Cointegration of titanium nitride (TiN)-gate high-performance tied-gate three-terminal FinFETs with symmetric gate-oxide thicknesses (tox1=tox2=1.7 nm) and variable threshold-voltage Vth independent-gate four-terminal (4T) FinFETs with asymmetric gate-oxide thicknesses (tox1=1.7 nm for the driving-gate-oxide, and tox2=3.4 or 7.0 nm for the control-gate-oxide) has been successfully developed using conventional reactive sputtering, two-step Si-fin and gate-oxide formation, and resist etch-back processes. A significantly improved subthreshold slope and an extremely low OFF-state current Ioff are experimentally confirmed in the asymmetric gate-oxide thickness 4T FinFETs by increasing the control-gate-oxide thickness to twice or more the driving-gate-oxide thickness. The developed techniques are attractive for high-performance and low-power FinFET very large-scale integration circuits

22 March 2004
Verified
Conference Paper
Closed access
YLYongxun Liu
Yongxun Liu
MMM. Masahara
M. Masahara
KIK. Ishii
K. Ishii
TTT. Tsutsumi
T. Tsutsumi
TST. Sekigawa
T. Sekigawa
ESE. Suzuki
E. Suzuki
The FT-FinFETs with independent double gates and an ideal rectangular cross-section Si-Fin channel have successfully been fabricated by using newly developed orientation-dependent wet etching. The flexible V/sub th/ controllability by using one of the double gates as a control gate and by the synchronized driving mode operation is experimentally confirmed. The developed processes are attractive for the fabrication of the advanced separate-gates FinFET for a flexible function VLSI circuit.