We present results of our investigations on nickel silicidation of top-down fabricated silicon nanowires (SiNWs). Control over the silicidation process is important for the application of SiNWs in reconfigurable field-effect transistors. Silicidation is performed using a rapid thermal annealing process on the SiNWs fabricated by electron beam lithography and inductively-coupled plasma etching. The effects of variations in crystallographic orientations of SiNWs and different NW designs on the silicidation process are studied. Scanning electron microscopy and transmission electron microscopy are performed to study Ni diffusion, silicide phases, and silicide–silicon interfaces. Control over the silicide phase is achieved together with atomically sharp silicide–silicon interfaces. We find that {111} interfaces are predominantly formed, which are energetically most favorable according to density functional theory calculations. However, control over the silicide length remains a challenge.

Feasible device architectures for ultrascaled carbon nanotubes field-effect transistors (CNTFETs) are studied down to 5.9 nm using a multiscale simulation approach covering electronic quantum transport simulations and numerical device simulations. Schottky-like and ohmiclike contacts are considered. The simplified approach employed in the numerical device simulator is critically evaluated and verified by means of comparing the results with electronic quantum simulation results of an identical device. Different performance indicators, such as the switching speed, switching energy, the subthreshold slope, I _on /I _off -ratio, among others, are extracted for different device architectures. These values guide the evaluation of the technology for different application scenarios. For high-performance logic applications, the buried gate CNTFET is claimed to be the most suitable structure.

The transport properties of novel device architectures depend strongly on the morphology and the quality of the interface between contact and channel materials. In silicon nanowires with nickel silicide contacts, NiSi${}_2$ –Si interfaces are particularly important as NiSi${}_2$ is often found as the phase adjacent to the silicide–silicon interface during and after the silicidation. The interface orientation of these NiSi${}_2$ –Si interfaces as well as the ability to create abrupt and flat interfaces, ultimately with atomic sharpness, is essential for the properties of diverse emerging device concepts. We present a combined experimental and theoretical study on NiSi${}_2$ –Si interfaces. Interfaces in silicon nanowires were fabricated using silicidation and characterized by high-resolution (scanning) transmission electron microscopy. It is found that {111} interfaces occur in ⟨110⟩ nanowires. A tilted interface and an arrow-shaped interface are observed, which depends on the nanowire diameter. We have further modeled NiSi${}_2$ –Si interfaces by density functional theory. Different crystallographic orientations and interface variations, e.g., due to interface reconstruction, are compared with respect to interface energy densities. The {111} interface is energetically most favorable, which explains the experimental observations. Possible ways to control the interface type are discussed.

A model is presented which describes reconfigurable field-effect transistors (RFETs) with metal contacts, whose switching is controlled by manipulating the Schottky barriers at the contacts. The proposed modeling approach is able to bridge the gap between quantum effects on the atomic scale and the transistor switching. We apply the model to transistors with a silicon channel and NiSi2 contacts. All relevant crystal orientations are compared, focusing on the differences between electron and hole current, which can be as large as four orders of magnitude. Best symmetry is found for the [Formula: see text] orientation, which makes this orientation most advantageous for RFETs. The observed differences are analyzed in terms of the Schottky barrier height at the interface. Our study indicates that the precise orientation of the interface relative to a given transport direction, perpendicular or tilted, is an important technology parameter, which has been underestimated during the previous development of RFETs. Most of the conclusions regarding the studied metal-semiconductor interface are also valid for other device architectures.

The fabrication of individual nanowire-based devices and their comprehensive electrical characterization remains a major challenge. Here, we present a symmetric Hall bar configuration for highly p-type germanium nanowires (GeNWs), fabricated by a top-down approach using electron beam lithography and inductively coupled plasma reactive ion etching. The configuration allows two equivalent measurement sets to check the homogeneity of GeNWs in terms of resistivity and the Hall coefficient. The highest Hall mobility and carrier concentration of GeNWs at 5 K were in the order of 100 ${\mathrm{cm}}^2/\left(\mathrm{Vs}\right)$ and $4\times {10}^{19}{\mathrm{cm}}^{-3}$, respectively. With a decreasing nanowire width, the resistivity increases and the carrier concentration decreases, which is attributed to carrier scattering in the region near the surface. By comparing the measured data with simulations, one can conclude the existence of a depletion region, which decreases the effective cross-section of GeNWs. Moreover, the resistivity of thin GeNWs is strongly influenced by the cross-sectional shape.