An electrical characterization of based metal-insulator-semiconductor structures has been carried out by using capacitance-voltage, deep level transient spectroscopy, and conductance-transient techniques. Dielectric films were atomic layer deposited (ALD) at temperatures ranging from 300 to 800 °C directly on silicon substrates and on an buffer layer that was grown in the same process by using 15 ALD cycles at 300 °C. As for single growth temperatures, 300 °C leads to the lowest density of states distributed away from the interface to the insulator [disorder-induced gap states (DIGS)], but to the highest interfacial state density . However, by using double growth temperatures it is possible to maintain low DIGS values and to improve the interface quality in terms of . The very first ALD cycles define the dielectric properties very near to the dielectric-semiconductor interface, and growing an upper layer at higher ALD temperature produces some annealing of interfacial states, thus improving the interface quality. Also, samples in which the only layer or the upper one was grown at the highest temperature (800 °C) show the poorest results both in terms of and DIGS, so using very high temperatures yield defective dielectric films.
We have analyzed the electrical properties and bonding characteristics of thin films deposited at 200 °C by the electron cyclotron resonance plasma method. The films show the presence of hydrogen bonded to silicon (at the films with the ratio ) or to nitrogen (for films where the ratio N/Si is higher than 1.33). In the films with the N/Si ratio of 1.38, the hydrogen content is 6 at. %. For compositions which are comprised of between and 1.4, hydrogen concentration remains below 10 at. %. The films with exhibited the better values of the electrical properties (resistivity, and electric breakdown field, 3 MV/cm). We have used these films to make metal-insulator-semiconductor (MIS) devices on -type silicon wafers. measurements accomplished on the structures indicate that the interface trap density is kept in the range for films with the N/Si ratio below 1.38. For films where the N/Si ratio is higher than 1.4, the trap density suddenly increases, following the same trend of the concentration of N–H bonds in the films. The results are explained on the basis of the model recently reported by Lucovsky [J. Vac. Sci. Technol. B 14, 2832 (1996)] for the electrical behavior of (oxide–nitride–oxide)/Si structures. The model is additionally supported by deep level transient spectroscopy measurements, that show the presence of silicon dangling bonds at the insulator/semiconductor interface (the so-called center). The concentration of these centers follows the same trend with the film composition of the interface trap density and, as a consequence, with the concentration of N–H bonds. This result further supports the N–H bonds located at the insulator/semiconductor interface which act as a precursor site to the defect generation of the type i.e., the centers. A close relation between interface trap density, centers and N–H bond density is established.
1 January 2011 in Journal of Vacuum Science & Technology B
Room temperature conductance transients in the interface are reported. Silicon nitride thin films were directly deposited on silicon by the low temperature electron-cyclotron-resonance plasma method. The shape of the conductance transients varies with the frequency at which they are obtained. This behavior is explained in terms of a disorder-induced gap-state continuum model for the interfacial defects. A perfect agreement between experiment and theory is obtained proving the validity of the model.