Tian-Li Wu

Prof. Tian-Li Wu

National Chiao Tung University
orcid

Research Focus & Metrics

Academic Career Length

18Years (2009-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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5 August 2015 in IEEE Electron Device Letters
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Journal Article
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Tian-Li WuTian-Li Wu
Tian-Li Wu
DMDenis Marcon
Denis Marcon
SYShuzhen You
Shuzhen You
NPNiels Posthuma
Niels Posthuma
Benoit BakerootBenoit Bakeroot
Benoit Bakeroot
SDStefaan Decoutere
Stefaan Decoutere
In this letter, we studied the forward bias gate breakdown mechanism on enhancement-mode p-GaN gate AlGaN/GaN high-electron mobility transistors. To the best of our knowledge, it is the first time that the temperature dependence of the forward gate breakdown has been characterized. We report for the first time on the observation of a positive temperature dependence, i.e., a higher temperature leads to a higher gate breakdown voltage. Such unexpected behavior is explained by avalanche breakdown mechanism: at a high positive gate bias, electron/hole pairs are generated in the depletion region at the Schottky metal/p-GaN junction. Furthermore, at a high gate bias but before the catastrophic gate breakdown, a light emission was detected by a emission microscopy measurement. This effect indicates an avalanche luminescence, which is mainly due to the recombination of the generated electron/hole pairs.

16 February 2016 in IEEE Electron Device Letters
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Matteo MeneghiniMatteo Meneghini
Matteo Meneghini
IRIsabella Rossetto
Isabella Rossetto
DBDavide Bisi
Davide Bisi
MRMaria Ruzzarin
Maria Ruzzarin
MHMarleen Van Hove
Marleen Van Hove
EZEnrico Zanoni
Enrico Zanoni
This letter reports an in-depth study of the negative threshold voltage instability in GaN-on-Si metal-insulator-semiconductor high electron mobility transistors with partially recessed AlGaN. Based on a set of stress/recovery experiments carried out at several temperatures, we demonstrate that: 1) operation at high temperatures and negative gate bias (-10 V) may induce a significant negative threshold voltage shift, that is well correlated to a decrease in on-resistance; 2) this process has time constants in the range between 10-100 s, and is accelerated by temperature, with activation energy equal to 0.37 eV; and 3) the shift in threshold voltage is recoverable, with logarithmic kinetics. The negative shift in threshold voltage is ascribed to the depletion of trap states located at the SiN/AlGaN interface and/or in the gate insulator.

30 October 2017 in IEEE Electron Device Letters
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Tian-Li WuTian-Li Wu
Tian-Li Wu
Benoit BakerootBenoit Bakeroot
Benoit Bakeroot
HLHu Liang
Hu Liang
NPNiels Posthuma
Niels Posthuma
SYShuzhen You
Shuzhen You
SDStefaan Christiaan Decoutere
Stefaan Christiaan Decoutere
In this letter, we analyzed the gate capacitance characteristics in p-GaN gate/AlGaN/GaN heterostructures by using a two-junction capacitor model. First, we have observed that the ${C}$ – ${V}$ behavior depends on the different processing conditions of the p-GaN gate. Second, a two-junction capacitor model considering a series connection of the Schottky metal/p-GaN junction capacitor and the AlGaN barrier capacitor is proposed to explain this ${C}$ – ${V}$ behavior. Based on this model, the junction capacitance has an influence on the total capacitance value under a high gate bias due to the Schottky metal/p-GaN junction. Furthermore, the Mg-concentration and hole density can be extracted. The extracted hole density is consistent with the results obtained by Hall measurements.

4 February 2015 in Physica Status Solidi (a)
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DBDavide Bisi
Davide Bisi
Matteo MeneghiniMatteo Meneghini
Matteo Meneghini
MHMarleen Van Hove
Marleen Van Hove
DMDenis Marcon
Denis Marcon
SSSteve Stoffels
Steve Stoffels
EZEnrico Zanoni
Enrico Zanoni

15 July 2013 in IEEE Transactions on Power Electronics
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Matteo MeneghiniMatteo Meneghini
Matteo Meneghini
DBDavide Bisi
Davide Bisi
DMDenis Marcon
Denis Marcon
SSSteve Stoffels
Steve Stoffels
MHMarleen Van Hove
Marleen Van Hove
EZEnrico Zanoni
Enrico Zanoni
This paper reports on an extensive analysis of the trapping processes and of the reliability of experimental AlGaN/GaN MIS-HEMTs, grown on silicon substrate. The study is based on combined pulsed characterization, transient investigation, breakdown, and reverse-bias stress tests, and provides the following, relevant, information: 1) the exposure to high gate-drain reverse-bias may result in a recoverable increase in the on-resistance (RON), and in a slight shift in threshold voltage; 2) devices with a longer gate-drain distance show a stronger increase in RON, compared to smaller devices; 3)current transient measurements indicate the existence of one trap level, with activation energy of 1.03 ± 0.09 eV; and 4) we demonstrate that through the improvement of the fabrication process, it is possible to design devices with negligible trapping. Furthermore, the degradation of the samples was studied by means of step-stress experiments in off-state. Results indicate that exposure to moderate-high reverse bias (<; 250 V for LGD = 2 μm) does not induce any measurable degradation, thus confirming the high reliability of the analyzed samples. A permanent degradation is detected only for very high reverse voltages (typically, VDS = 260-265 V, on a device with LGD = 2 μm stressed with VGS = - 8 V) and consists of a rapid increase in gate leakage current, followed by a catastrophic failure. EL measurements and microscopy investigation revealed that degradation occurs close to the gate, in proximity of the sharp edges of the drain contacts, i.e., in a region where the electric field is maximum.

6 June 2024 in Nature Reviews Electrical Engineering
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CTChang-Ching Tu
Chang-Ching Tu
CHChia-Lung Hung
Chia-Lung Hung
KHKuo-Bin Hong
Kuo-Bin Hong
SESurya Elangovan
Surya Elangovan
WYWei-Chen Yu
Wei-Chen Yu
Hao-Chung KuoHao-Chung Kuo
Hao-Chung Kuo