In this paper, a full-duplex transceiver with a two-stage analog interference cancellation architecture is proposed for the prevailing wireless full-duplex communication, which enables simultaneous transmission and reception on the same frequency. This two-stage cancellation architecture jointly combines the structures of two typical analog self-interference (SI) cancellation approaches, i.e., the radio frequency (RF)-tapping and the baseband-tapping approaches, and mitigates the SI signal in two steps to provide an improved analog cancellation performance with reduced restrictions on the RF components required to build the cancellation architecture. The stage-I cancellation uses a dual-tap analog canceling circuit to mitigate only the direct leakage and one refection component within the SI signal to yield a residual multipath SI of reduced dynamic range. In the stage-II cancellation, a nonlinear model is particularly designed to build a multipath canceling signal in digital domain, which is capable of characterizing the joint effect of the multipath SI propagation channel, the transmitter nonlinearity, and the receiver nonlinearity of high accuracy. The digital canceling signal is then transmitted through an auxiliary transmit chain to cancel the residual SI from the stage-I cancellation to further improve the overall analog cancellation performance. Simulations are explicitly performed on a variety of wideband signals to verify cancellation capability of the proposed full-duplex transceiver. For proof-of-concept verification, experiments are also performed on our self-designed testbed to validate the cancellation performances of each cancellation stage.

This paper presents a new architecture for the frequency-selective digital predistortion (DPD) for two- and three-band power amplifier (PA) linearization. Also, largely spaced-signal DPD using a digital intermediate frequency (IF) technique is demonstrated. The algorithm used accounts for differential memory effects up to fifth order for bands that can be arbitrarily spaced. The simulation and experimental studies are performed using various signal sets; two- and three-band multitone signals with various tone spacing, band separation, and complementary cumulative distribution function. An improvement of 10 dB over third-order linearization is demonstrated in simulation for more than 20 dB of adjacent channel power ratio reduction. The test signal and the linearization algorithm were implemented on a field-programmable gate array. The linearization algorithm was applied to an RF amplifier at 700-900 MHz. For the two-band case, more than 15 dB on the in-band, 13 dB on the third, and 5 dB on the fifth intermodulation distortion (IMD) cancellation were achieved. For the three-band case, more than 12 dB of IMD cancellation was observed. For largely spaced signal DPD, more than 15 dB of IMD cancellation was achieved. In the three-band case, the linearization of intermodulation byproducts overlapping with the in-band distortion is found to be of critical importance.

An analytic theory for dual-input outphasing power amplifiers that incorporate in one unified treatment, the continuum of solutions for power combining including the Doherty and Chireix modes is presented. This unified theory developed at the current-source reference planes reveals the performance trade-off achieved by all of the possible power amplifier (PA) combiners within the continuum of solutions. Furthermore, it identifies a novel type of dual-input hybrid Chireix-Doherty PA that combines key features of the Doherty and Chireix operations such that the fundamental drain voltages applied to both the main and auxiliary transistors remain constant. This hybrid PA relies on an input outphasing angle varying with the input power level to obtain the correct load modulation behavior. A 2-GHz dual-input hybrid Chireix-Doherty PA is implemented using nonlinear embedding and experimentally evaluated to validate the theory. A drain efficiency of 61% at 9-dB backoff power and a maximum output power of about 43 dBm are obtained for continuous-wave (CW) measurements. The efficiency increases monotonously with output power unlike that of the Doherty PA used for comparison. When excited with a 20-MHz LTE signal with 9.5-dB peak-to-average power ratio (PAPR), the dual-input PA yields a 60.0% average drain efficiency and -48.1-dBc adjacent-channel power-leakage ratio (ACLR) after linearization.

This letter presents the design of a continuous class E/F power amplifier (PA) using model-based nonlinear embedding. The theoretically calculated continuous class E/F loads defined at the current source reference plane (CRP) may not guarantee feasible loads at the extrinsic package reference plane (ERP) due to nonlinear parasitic. Hence, a design space is analyzed to map the correct mode of the class E/F continuum over broadband to obtain feasible loads. A scheme is presented to assign fundamental current component (φ ) to various frequencies over the band to obtain a tradeoff between best bandwidth and feasibility of a passive matching network. A nonlinear embedding model is used to project the loads from CRP to ERP. As a proof of concept, a continuous class E/F PA is designed using CGH27015F. The prototype developed has measured a drain efficiency of 60.2%-76.5% from 1.5 to 2.9 GHz which corresponds to 63.6% fractional bandwidth.

A new type of wideband dual-input hybrid Doherty outphasing power amplifier (HDO-PA) is developed in which the load-modulation scheme continuously converts as the frequency increase, from the previously reported HDO-PA mode with maximum flat efficiency response versus power to the conventional Doherty PA mode. For a symmetric HDO-PA implementation, this corresponds to the peak-to-backoff fundamental voltage ratio of the auxiliary amplifier linearly varying from 9/7 to 2 with frequency. A transmission-line-based wideband HDO-PA prototype is first established at the current-source reference planes to cover the frequency band from 1.4-GHz to 2.5-GHz. The wideband HDO-PA is implemented next at the package reference planes by synthesizing the wideband combiner circuit required to sustain the intrinsic load-modulation behavior across the entire frequency bandwidth. A 1.4-GHz to 2.5-GHz wideband HDO-PA is fabricated and characterized using both continuous-wave and modulated signals. The 6-dB backoff efficiency varies from 60% to 44% and the maximum power from 44.8 dBm to 42.9 dBm as the frequency increases. When the PA is excited with a 20 MHz bandwidth long-term evolution signal at 1.7 GHz with 6.5 dB peak-to-average-power ratio (PAPR), the PA achieves an average drain efficiency of 50.3% with -32.0 dBc adjacent-channel-power leakage ratio (ACLR) and an average drain efficiency of 47.8% with -54.0 dBc ACLR after digital predistortion linearization.