In this article, a novel 13-level inverter Single source, Switched-Capacitor Multi-Level Inverter (SSC-MLI), is proposed. This topology is suitable for renewable energy applications using less input voltage source magnitude. This structure is capable of boosting the input voltage six times with the help of switched capacitors. The capacitors are automatically balanced without any control algorithms, complex circuits, or closed-loop controllers. The advantages of the proposed structure are high power density and high efficiency by use of only switches. Since, there is no diodes there is no forward conduction loss, and no reverse recovery delay. The maximum blocking voltage across individual switch is three times the input voltage. The functionality of the SSC-MLI is described in detail. The capacitance calculation and optimum value of capacitors are discussed. A suitable comparison is presented for the proposed structure with the existing literature to check the inverter performance. The power loss for exiting a 13-level inverter is presented. The simulation is carried out for both pure resistive and inductive load. Later, the experimental results are presented for variation in frequency, dynamic change in load, variation in modulation index, and step-change in input voltage to validate the proposed topology performance and feasibility.
20 April 2022 in IEEE Transactions on Circuits and Systems II: Express Briefs
This brief presents a five-level common ground type (5L-CGT) inverter topology with double voltage boosting. This topology uses only eight switches, two capacitors that can be charged equal to the input source. The advantageous feature of this topology is the CGT configuration between the input source and output load, which ensures minimal common-mode voltage and leakage current. A detailed analysis is done to select and size capacitors, along with quasi-soft charging to minimize the charging current ripples across the capacitors. The performance of the proposed 5L-CGT inverter is tested for inductive load, varying the modulation index/load/input voltage under experimental test conditions. A detailed comparison is done with the existing state-of-art that shows the merits of the proposed topology in terms of equal voltage stress across the capacitor with voltage boost. The power loss analysis for the inverter is carried out using PLECS with efficiency to be 97.20%, and the experimental efficiency is found to be 96.54% for the 900W inverter prototype.
1 February 2019 in International Journal of Electrical Power & Energy Systems