Yufan Du

Yufan Du

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Yufan Du

Peking University, Beijing, China

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Representative Publications

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8 October 2024
Verified
Conference Paper
Open access
GNGuangtao Nie
Guangtao Nie
RZRong Zhi
Rong Zhi
XYXiaofan Yan
Xiaofan Yan
YDYufan Du
Yufan Du
XZXiangyang Zhang
Xiangyang Zhang
JHJinghe Hu
Jinghe Hu
Multi-agent collaboration is the latest trending method to build conversational recommender systems (CRS), especially with the widespread use of Large Language Models (LLMs) recently. Typically, these systems employ several LLM agents, each serving distinct roles to meet user needs. In an industrial setting, it’s essential for a CRS to exhibit low first token latency (i.e., the time taken from a user’s input until the system outputs its first response token.) and high scalability—for instance, minimizing the number of LLM inferences per user request—to enhance user experience and boost platform profit. For example, JD.com’s baseline CRS features two LLM agents and a search API but suffers from high first token latency and requires two LLM inferences per request (LIPR), hindering its performance. To address these issues, we introduce a Hybrid Multi-Agent Collaborative Recommender System (Hybrid-MACRS). It includes a central agent powered by a fine-tuned proprietary LLM and a search agent combining a related search module with a search engine. This hybrid system notably reduces first token latency by about 70% and cuts the LIPR from 2 to 1. We conducted thorough online A/B testing to confirm this approach’s efficiency.

23 June 2024
Verified
Conference Paper
Open access
YDYufan Du
Yufan Du
ZGZizheng Guo
Zizheng Guo
XJXun Jiang
Xun Jiang
ZCZhuomin Chai
Zhuomin Chai
YZYuxiang Zhao
Yuxiang Zhao
RHRu Huang
Ru Huang
Accurate and efficient power analysis at early VLSI design stages is critical for effective power optimization. It is a promising yet challenging task to model the circuit power at early design stages, especially during placement with the clock tree and final signal routing unavailable. Additionally, optimization-induced circuit transformations like circuit restructuring and gate sizing can invalidate fine-grained power supervision. Addressing these difficulties, we introduce the first circuit-transformation-aware power prediction model at placement stage with robust generalization capabilities. Our technology includes a dedicated clock tree model and an innovative train-and-calibrate scheme that effectively integrates topological and layout features. Compared to the cutting-edge commercial IC engine Innovus, we have significantly reduced the cross-stage power analysis error between placement and detailed routing.

27 October 2024
Verified
Conference Paper
Open access
YDYufan Du
Yufan Du
ZGZizheng Guo
Zizheng Guo
YLYibo Lin
Yibo Lin
RWRunsheng Wang
Runsheng Wang
RHRu Huang
Ru Huang

27 October 2024
Verified
Conference Paper
Open access
ZGZizheng Guo
Zizheng Guo
ZZZuodong Zhang
Zuodong Zhang
WLWuxi Li
Wuxi Li
THTsung-Wei Huang
Tsung-Wei Huang
XSXizhe Shi
Xizhe Shi
RHRu Huang
Ru Huang