Jiarui Wang

Jiarui Wang

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Jiarui Wang

School of Computer Science, Peking University, Beijing, China

Research Focus & Metrics

Academic Career Length

8Years (2019-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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7 September 2023 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Verified
Journal Article
Closed access
JMJing Mai
Jing Mai
JWJiarui Wang
Jiarui Wang
ZDZhixiong Di
Zhixiong Di
YLYibo Lin
Yibo Lin
When modern FPGA architecture becomes increasingly complicated, modern FPGA placement is a mixed optimization problem with multiple objectives, including wirelength, routability, timing closure, and clock feasibility. Typical FPGA devices nowadays consist of heterogeneous SLICEs like SLICEL and SLICEM. The resources of a SLICE can be configured to fLUT, FF, distributed RAM, SHIFT, CARRYg. Besides such heterogeneity, advanced FPGA architectures also bring complicated constraints like timing, clock routing, carry chain alignment, etc. The above heterogeneity and constraints impose increasing challenges to FPGA placement algorithms. In this work, we propose a multi-electrostatic FPGA placer considering the aforementioned SLICEL-SLICEM heterogeneity under timing, clock routing and carry chain alignment constraints. We first propose an effective SLICEL-SLICEM heterogeneity model with a novel electrostatic-based density formulation. We also design a dynamically adjusted preconditioning and carry chain alignment technique to stabilize the optimization convergence. We then propose a timing-driven net weighting scheme to incorporate timing optimization. Finally, we put forward a nested Lagrangian relaxation-based placement framework to incorporate the optimization objectives of wirelength, routability, timing, and clock feasibility. Experimental results on both academic and industrial benchmarks demonstrate that our placer outperforms the state-of-the-art placers in quality and efficiency.

21 August 2024 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Verified
Journal Article
Closed access
XJXun Jiang
Xun Jiang
JWJiarui Wang
Jiarui Wang
JMJing Mai
Jing Mai
ZDZhixiong Di
Zhixiong Di
YLYibo Lin
Yibo Lin
Routing is the most time-consuming step in the implementation flow of field programmable gate array (FPGA) designs. With the advance in transistor scaling and system integration, hardware resources in FPGA devices are growing in a larger quantity and diversity. The routing architecture is designed to be more complicated for mapping RTL designs to FPGA devices correctly, which brings significant challenges for current FPGA routing algorithms. The key challenges for routing algorithms lie in large solution space and heavy congestion, especially for high-fanout nets (HFNets). We propose a partition-based algorithm to accelerate the routing of HFNets, which decomposes the global routing guide to shrink the search space for connecting each sink. Meanwhile, the congestions existing inside configurable logic block (CLB) are hard to handle by traditional sequential negotiation-based algorithms, because the industrial routing architecture is quite complex. We propose a concurrent intra-CLB rerouting algorithm to effectively resolve routing congestion inside a CLB tile induced by connections between intra-CLB logic pins, e.g., logic elements and switch boxes. Experimental results on modified ISPD2016 benchmarks demonstrate that our framework can achieve 100% routability in 9.8% less wirelength and $11\times $ less runtime, while the state-of-the-art VTR 8.0 routing algorithm fails at 7 of 12 benchmarks.

8 November 2020
Verified
Conference Paper
Closed access
XCXuequan Chen
Xuequan Chen
QSQiushuo Sun
Qiushuo Sun
JWJiarui Wang
Jiarui Wang
EMEmma MacPherson
Emma MacPherson
Although terahertz waves have been used in various in vivo skin studies, hitherto, very little attention has been given to the skin surface features. Quantitative studies are of great importance to analyze their effects on the characterization of skin and skin modeling. We use Lumerical FDTD and Comsol to simulate the influence on the THz reflectivity for different hydration levels, polarizations and frequencies. Considerably large errors are observed, suggesting that the influence should be carefully considered in THz skin measurements.

23 June 2024
Verified
Conference Paper
Open access
JWJiarui Wang
Jiarui Wang
XJXun Jiang
Xun Jiang
YLYibo Lin
Yibo Lin
Modern System-on-Chip (SoC) design is divided into hierarchical instances using the multiply-instantiated block (MIB) technique to simplify the design process. Top-level routing aims at providing routing prototyping between those instances. It requires consideration of replicated routing paths that can either be utilized for routing or remain as floating segments. Conventional path-searching based algorithm often fails to find a legal solution under such a scenario. To address this, we propose an effective and efficient top-level routing framework for MIBs by hashing the topology of each net and using a group maze routing scheme. Experimental results demonstrate promising performance compared to the winners of the MIB-aware top-level router contest 2022 organized by Synopsys.

1 September 2019
Verified
Conference Paper
Closed access
JWJiarui Wang
Jiarui Wang
QSQiushuo Sun
Qiushuo Sun
RSRayko I. Stantchev
Rayko I. Stantchev
EMEmma MacPherson
Emma MacPherson
We use THz imaging to measure and quantify the effects of applying silicone gel sheeting on skin. We show how THz measurements can detect subtle hydration changes caused by the silicone gel sheeting, indicating that THz imaging is a promising method to quantitatively assess skin treatment strategies.