The breakdown performance is a critical metric for power device design. This paper explores the feasibility of efficiently predicting the breakdown performance of silicon on insulator (SOI) lateral power device using multi-layer neural networks as an alternative to expensive technology computer-aided design (TCAD) simulation. In this work, we propose the first breakdown performance prediction framework, PowerNet, for SOI lateral power devices, based on deep learning methods. The framework can provide breakdown location prediction and breakdown voltage (BV) prediction by utilizing a two-stage machine learning method. In addition, it demonstrates 97.67% accuracy on breakdown location prediction and less than 4% average error on the BV prediction compared with TCAD simulation. The proposed method can be used to measure changes in performance caused by random variability in structural parameters during manufacturing process, allowing designers to avoid unstable structural parameters and enhance design robustness. More importantly, it can significantly reduce the computational cost when compared with the TCAD simulation. We believe the proposed machine learning technique can significantly speedup the design space exploration for power devices, eventually reducing the overall product-to-market time.

Background Endovascular thrombectomy (ET) is the standard of care for treatment of acute ischemic stroke (AIS) secondary to large vessel occlusion. The elderly population has been under-represented in clinical trials on ET, and recent studies have reported higher morbidity and mortality in elderly patients than in their younger counterparts. Objective To use machine learning algorithms to develop a clinical decision support tool that can be used to select elderly patients for ET. Methods We used a retrospectively identified cohort of 110 patients undergoing ET for AIS at our institution to train a regression tree model that can predict 90-day modified Rankin Scale (mRS) scores. The identified algorithm, termed SPOT, was compared with other decision trees and regression models, and then validated using a prospective cohort of 36 patients. Results When predicting rates of functional independence at 90 days, SPOT showed a sensitivity of 89.36% and a specificity of 89.66% with an area under the receiver operating characteristic curve of 0.952. Performance of SPOT was significantly better than results obtained using National Institutes of Health Stroke Scale score, Alberta Stroke Program Early CT score, or patients’ baseline deficits. The negative predictive value for SPOT was >95%, and in patients who were SPOT-negative, we observed higher rates of symptomatic intracerebral hemorrhage after thrombectomy. With mRS scores prediction, the mean absolute error for SPOT was 0.82. Conclusions SPOT is designed to aid clinical decision of whether to undergo ET in elderly patients. Our data show that SPOT is a useful tool to determine which patients to exclude from ET, and has been implemented in an online calculator for public use.

Modern Field Programmable Gate Arrays (FPGAs) are large-scale heterogeneous programmable devices that enable high performance and energy efficiency. Placement is a crucial and computationally intensive step in the FPGA design flow that determines the physical locations of various heterogeneous instances in the design. Several works have employed GPUs and FPGAs to accelerate FPGA placement and have obtained significant runtime improvement. However, with these approaches, it is a non-trivial effort to develop optimized and algorithmic-specific kernels for GPU and FPGA to realize the best acceleration performance. In this work, we present DREAMPlaceFPGA, an open-source deep-learning toolkit-based accelerated placement framework for large-scale heterogeneous FPGAs. Notably, we develop new operators in our framework to handle heterogeneous resources and FPGA architecture-specific legality constraints. The proposed framework requires low development cost and provides an extensible framework to employ different placement optimizations. Our experimental results on the ISPD'2016 benchmarks show very promising results compared to prior approaches.

The selection of design structure parameters is a critical step for meeting the performance requirement for silicon on insulator (SOI) lateral power devices, especially when multiple design constraints are presented. In this letter, we propose a fully-automated structural design method for SOI lateral power device based on a Bayesian optimization (BO) framework. Given the design target characterized by breakdown voltage (BV) and on-resistance (Ron) specifications, the proposed approach searches for the optimal structure that can satisfy the constraints. The experimental results demonstrate that designs obtained from our optimization framework fall within 5% range from the desired specifications when evaluated using technology computer-aided design (TCAD) simulation, which proves the efficiency of the proposed approach. Besides, the efficiency of our proposed approach is reflected by its runtime which does not exceed 10 minutes for more than 70% of the cases. We believe that this modeling method can greatly accelerate the design exploration process of power devices for designers.

In this paper, we propose a novel methodology for detecting systematic failure patterns at the wafer level for yield learning. Our proposed methodology takes the binary testing results (i.e., pass or fail) of all dies over multiple wafers, cluster these wafers according to their spatial signatures of failures, and eventually identify the underlying systematic failure patterns. Several data processing techniques, including singular value decomposition, hierarchical clustering, etc., are adopted to make the proposed methodology robust to random failures. In addition, a Pseudo-Boolean satisfiability solver is used to extract a minimal set of systematic failure patterns that explain all wafer-level spatial signatures. These patterns help process engineers identify the root causes of failures and accelerate yield learning. The efficacy of our proposed approach is demonstrated by one synthetic data set and one industrial data set.