Designing synthetic-aperture radar image formation systems can be challenging due to the numerous options of algorithms and devices that can be used. There are many SAR image formation algorithms, such as backprojection, matched-filter, polar format, Range–Doppler and chirp scaling algorithms. Each algorithm presents its own advantages and disadvantages considering efficiency and image quality; thus, we aim to introduce some of the most common SAR image formation algorithms and compare them based on these two aspects. Depending on the requisites of each individual system and implementation, there are many device options to choose from, for instance, FPGAs, GPUs, CPUs, many-core CPUs, and microcontrollers. We present a review of the state of the art of SAR imaging systems implementations. We also compare such implementations in terms of power consumption, execution time, and image quality for the different algorithms used.

Synthetic aperture radar is a microwave technique to extracting image information of the target. Electromagnetic waves that are reflected from the target are acquired by the aircraft or satellite receivers and sent to a ground station to be processed by applying computational demanding algorithms. Radar data streams are acquired by an aircraft or satellite and sent to a ground station to be processed in order to extract images from the data since these processing algorithms are computationally demanding. However, novel applications require real-time processing for real-time analysis and decisions and so onboard processing is necessary. Running computationally demanding algorithms on onboard embedded systems with limited energy and computational capacity is a challenge. This article proposes a configurable hardware core for the execution of the backprojection algorithm with high performance and energy efficiency. The original backprojection algorithm is restructured to expose computational parallelism and then optimized by replacing floating-point with fixed-point arithmetic. The backprojection core was integrated into a system-on-chip architecture and implemented in a field-programmable gate array. The proposed solution runs the optimized backprojection algorithm over images of sizes $512\times 512$ and $1024\times 1024$ in 0.14 s (0.41 J) and 1.11 s (3.24 J), respectively. The architecture is $2.6\times$ faster and consumes $13\times$ less energy than an embedded Jetson TX2 GPU. The solution is scalable and, therefore, a tradeoff exists between performance and utilization of resources.

This paper presents an optimized multicore embedded architecture to speed up and improve the resilience of the execution of a backprojection algorithm targeting onboard synthetic-aperture radar (SA...

This paper details a design optimization on a hardware accelerator for an on-board real-time SAR imaging system using the Backprojection algorithm, focusing on algorithm-specific approximations intended to reduce the overhead introduced by intensive functions such as the square root, sine, and cosine functions. The main novelty of this work is that new approximations were investigated so that the final image retains high quality regardless of the error in the approximation function. This paper revisits existing approximation methods, such as linear interpolation, polynomial approximation using the Vandermonde matrix, and Chebyshev polynomials, and compares their performance on the algorithm. Results demonstrate that it is possible to maintain the image quality with an SSIM above 0.99 with less 93% LUTs for the square root and less 88% LUTs for the sine and cosine functions using polynomial approximation with the Vandermonde matrix when compared to the HLS baseline functions.