Geon-Hak Kim

Mr. Geon-Hak Kim

Kyunghee University, Suwon, Gyeonggi, Republic of Korea
orcid

Research Focus & Metrics

Academic Career Length

5Years (2022-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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12 April 2023 in IEEE Transactions on Circuits and Systems II: Express Briefs
Verified
Journal Article
Closed access
YKYoung-Min Kang
Young-Min Kang
JPJung-Jin Park
Jung-Jin Park
GKGeon-Hak Kim
Geon-Hak Kim
ICIk-Joon Chang
Ik-Joon Chang
JKJinsang Kim
Jinsang Kim
With aggressive scaling down in integrated circuit technology, the design of double-node-upset (DNU)-resilient latches have become a major issue regarding radiation hardening by design (RHBD). The conventional DNU-resilient latches are mostly based on the Muller C-element (MCE) and the dual-interlocked storage cell (DICE) element, which exhibit severe limitations: charge sharing during the read operation at a system level and large power consumption. Overcoming these limitations, this brief proposes a DNU-resilient latch based on a novel latch element. The proposed latch fully exploits upset polarity awareness, achieving the maximum number of single-event upset (SEU)-insensitive nodes. We develop a novel double modular redundancy architecture for the DNU-resilient latch design with one SEU-immune module. Based on simulation results, the proposed latch achieves up to 27.6X average power-delay-area-product (PDAP) improvement over state-of-the-art DNU-resilient latches.

8 August 2022 in Electronics
Verified
Journal Article
Open access
PDF file
JPJung-Jin Park
Jung-Jin Park
YKYoung-Min Kang
Young-Min Kang
GKGeon-Hak Kim
Geon-Hak Kim
ICIk-Joon Chang
Ik-Joon Chang
JKJinsang Kim
Jinsang Kim
Due to aggressive scaling down, multiple-node-upset hardened design has become a major concern regarding radiation hardening. The proposed latch overcomes the architecture and performance limitations of state-of-the-art double-node-upset (DNU)-resilient latches. A novel stacked latch element is developed with multiple thresholds, regular architecture, increased number of single-event upset (SEU)-insensitive nodes, low power dissipation, and high robustness. The radiation-aware layout considering layout-level issues is also proposed. Compared with state-of-the-art DNU-resilient latches, simulation results show that the proposed latch exhibits up to 92% delay and 80% power reduction in data activity ratio (DAR) of 100%. The radiation simulation using the dual-double exponential current source model shows that the proposed latch has the strongest radiation-hardening capability among the other DNU-resilient latches.