In this letter, 600-V normally-OFF SiN_x/AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) is reported. Normally-OFF operation and low OFF-state gate leakage are obtained by using fluorine plasma ion implantation in conjunction with the adoption of a 17-nm SiN_x thin film grown by plasma-enhanced chemical vapor deposition as the gate insulator. The normally-OFF MIS-HEMT exhibits a threshold voltage of +3.6 V, a drive current of 430 mA/mm at a gate bias of 14 V, a specific ON-resistance of 2.1 mΩ·cm² and an OFF-state breakdown voltage of 604 V at a drain leakage current of 1 μA/mm with V_GS=0 V, and the substrate grounded. Effective current collapse suppression is obtained by AlN/SiN_x passivation as proved by high-speed pulsed I-V and low-speed high-voltage switching measurement results.

An effective passivation technique for AlGaN/GaN high-electron-mobility transistors (HEMTs) is presented. This technique features an AlN thin film grown by plasma-enhanced atomic layer deposition (PEALD). With in situ remote plasma pretreatments prior to the AlN deposition, an atomically sharp interface between ALD-AlN and III-nitride has been obtained. Significant current collapse suppression and dynamic ON-resistance reduction are demonstrated in the ALD-AlN-passivated AlGaN/GaN HEMTs under high-drain-bias switching conditions.

The dynamic on-state resistance (R$_{\text{DSON}}$) behavior of commercial GaN devices is very important for a GaN-based converter. Since the zero voltage switching techniques are popular in high-frequency power conversion, a dynamic R$_{\text{DSON}}$ test board integrating both hard and soft switching test circuits is built in this work. Two types of commercial GaN devices are tested and compared under hard and soft switching conditions by double-pulse and multi-pulse test modes, respectively. It has been found that their dynamic R$_{\text{DSON}}$ exhibit different behaviors depending on the off-state voltage and frequency under hard and soft switching conditions due to different device technologies, which should be taken fully into account for GaN-based converter design and loss estimation. In order to simulate the R$_{\text{DSON}}$ behavior in a steady-state operating converter, a multi-pulse measurement has been implemented, the results of which are compared with that of double-pulse test. Furthermore, the primary trapping mechanisms responsible for dynamic R$_{\text{DSON}}$ increase under different switching conditions are identified and verified by numerical device simulation using Silvaco TCAD tool.

We report an in situ low-damage pre-gate treatment technology in an atomic layer deposition (ALD) system prior to the ALD- Al₂O₃ deposition, to realize high-quality Al₂O₃/III-nitride (III-N) interface. The technology effectively removes the poor quality native oxide on the III-N surface while forming an ultrathin monocrystal-like nitridation interlayer (NIL) between Al₂O₃ and III-N surface. With the pre-gate treatment technology, high-performance Al₂O₃(NIL)/GaN/AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors are demonstrated, exhibiting well-behaved electrical characteristics including suppressed gate leakage current, a small subthreshold slope of ~64 mV/dec, and a small hysteresis of ~0.09 V.

Gallium nitride (GaN) power devices enable power electronic systems with enhanced power density and efficiency. Dynamic on-resistance (R _ON ) degradation (or current collapse), originating from buffer trapping, surface trapping and gate instability, has been regarded as a primary challenge for the lateral GaN-on-Si power devices. In this paper, we present an overview and discussion of the mechanisms, characterizations, modeling, and solutions for the degradation of dynamic R _ON in GaN power devices. The complex dynamics of acceptor/donor buffer traps and their impacts on dynamic R _ON have been analyzed and revealed by TCAD simulations and high-voltage back-gating measurements. The gate instability-induced dynamic R _ON increase in different GaN device technologies and the role of gate overdrive are also discussed. Wafer-level and board-level characterization techniques enabling accurate dynamic R _ON evaluation are reviewed. The dynamic R _ON performance of the state-of-the-art commercial GaN devices is presented, and a behavioral model with the dynamic R _ON degradation taken into consideration has been implemented for circuit analysis. The latest progress in GaN device technologies for enhanced dynamic performance is also reviewed and discussed.