In a dual active bridge (DAB) dc-dc converter, modulating the phase shift ratios can suppress reactive power and increase efficiency under non-unity voltage gain conditions. Derivation of the optimal shift ratios to achieve the minimum reactive power is challenging as a DAB can operate in four different scenarios (forward/backward, buck/boost) and each scenario has five operating modes. This paper firstly introduces a transformation that different DAB operating scenarios (forward/backward, buck/boost) can be equivalent to each other, then only optimization of one scenario (forward/buck) is required. Next, for the five modes in forward/buck scenario, based on a graphical method, this paper proves that each operating point of Mode 1, 2 and 5 can be mapped into that of Mode 3 with lower conduction losses, and only two modes (Mode 3 and 4) require detailed analysis. The optimization process of these two modes are derived step by step. Global optimal phase shift signals that minimizing the reactive power under four different DAB operating scenarios (forward/backward, buck/boost) are presented. A simple table and control block diagram are presented for practical implementation of global reactive power minimization control. Experimental comparison with other modulation schemes verifies the efficiency improvement of the proposed control method.

The dynamic on-state resistance (R$_{\text{DSON}}$) behavior of commercial GaN devices is very important for a GaN-based converter. Since the zero voltage switching techniques are popular in high-frequency power conversion, a dynamic R$_{\text{DSON}}$ test board integrating both hard and soft switching test circuits is built in this work. Two types of commercial GaN devices are tested and compared under hard and soft switching conditions by double-pulse and multi-pulse test modes, respectively. It has been found that their dynamic R$_{\text{DSON}}$ exhibit different behaviors depending on the off-state voltage and frequency under hard and soft switching conditions due to different device technologies, which should be taken fully into account for GaN-based converter design and loss estimation. In order to simulate the R$_{\text{DSON}}$ behavior in a steady-state operating converter, a multi-pulse measurement has been implemented, the results of which are compared with that of double-pulse test. Furthermore, the primary trapping mechanisms responsible for dynamic R$_{\text{DSON}}$ increase under different switching conditions are identified and verified by numerical device simulation using Silvaco TCAD tool.

Gallium nitride (GaN) power devices enable power electronic systems with enhanced power density and efficiency. Dynamic on-resistance (R _ON ) degradation (or current collapse), originating from buffer trapping, surface trapping and gate instability, has been regarded as a primary challenge for the lateral GaN-on-Si power devices. In this paper, we present an overview and discussion of the mechanisms, characterizations, modeling, and solutions for the degradation of dynamic R _ON in GaN power devices. The complex dynamics of acceptor/donor buffer traps and their impacts on dynamic R _ON have been analyzed and revealed by TCAD simulations and high-voltage back-gating measurements. The gate instability-induced dynamic R _ON increase in different GaN device technologies and the role of gate overdrive are also discussed. Wafer-level and board-level characterization techniques enabling accurate dynamic R _ON evaluation are reviewed. The dynamic R _ON performance of the state-of-the-art commercial GaN devices is presented, and a behavioral model with the dynamic R _ON degradation taken into consideration has been implemented for circuit analysis. The latest progress in GaN device technologies for enhanced dynamic performance is also reviewed and discussed.

We report a high-performance vertical GaN-on-GaN Schottky barrier diode (SBD) with a planar nitridation-based termination (NT) technique. The developed NT-SBD with nearly ideal Schottky contact exhibits a forward current density over kA/cm², current swing over 10¹³, and differential specific ON-resistance of 1.2 cm². The breakdown voltage is boosted from 335 V for unterminated-SBD to 995 V after termination, whereas a high ON/OFF current ratio (I_ON/I_OFF at -600 V) of ~10⁸ is realized in the NT-SBD. It has been verified that the NT technique can favorably modify GaN surface condition, leading to suppressed leakage current at the junction edge and enhanced breakdown voltage.

In this letter, fluorine-implanted termination (FIT) has been demonstrated in vertical GaN-on-GaN Schottky barrier diodes (SBDs). Owing to the unique feature of F ions, which can become negative fixed charges in GaN, electric field crowding at the junction edge can be mitigated and the breakdown voltage (BV) of the vertical GaN SBDs can be effectively enhanced. For SBDs, it is challenging to simultaneously achieve both high BV and low forward voltage drop (VF). Thanks to the effective leakage suppression by FIT, a high BV of ~800 V is realized in an FIT-SBD even with a low VF of 0.85 V (at 100 A/cm2). By incorporating an AlGaN tunneling-enhancement layer, the FIT-SBD can achieve further improved BV of ~1020 V and VF of 0.83 V. Fast reverse recovery performance has also been realized in the FIT-SBDs.

The recent emergence of free-standing GaN substrate has enabled the development of vertical GaN-on-GaN power devices. This letter presents the dynamic ON-resistance (RON) and reverse recovery performance of a novel vertical GaN-on-GaN Schottky barrier diode (SBD) characterized by a double pulse tester. The vertical GaN-on-GaN SBD exhibits fast reverse recovery with a low RON·Qrr figure-of-merit. For the first time, the current-collapse-free performance (i.e., no dynamic RON degradation) has been experimentally verified in a vertical GaN power rectifier under different switching conditions including: OFF-state stress bias up to 500 V, OFF-state stress time within 10 ^-6 -10 ² s, high temperature up to 150 °C, and different load current levels.