The dynamic on-state resistance (R$_{\text{DSON}}$) behavior of commercial GaN devices is very important for a GaN-based converter. Since the zero voltage switching techniques are popular in high-frequency power conversion, a dynamic R$_{\text{DSON}}$ test board integrating both hard and soft switching test circuits is built in this work. Two types of commercial GaN devices are tested and compared under hard and soft switching conditions by double-pulse and multi-pulse test modes, respectively. It has been found that their dynamic R$_{\text{DSON}}$ exhibit different behaviors depending on the off-state voltage and frequency under hard and soft switching conditions due to different device technologies, which should be taken fully into account for GaN-based converter design and loss estimation. In order to simulate the R$_{\text{DSON}}$ behavior in a steady-state operating converter, a multi-pulse measurement has been implemented, the results of which are compared with that of double-pulse test. Furthermore, the primary trapping mechanisms responsible for dynamic R$_{\text{DSON}}$ increase under different switching conditions are identified and verified by numerical device simulation using Silvaco TCAD tool.

A constant frequency zero-voltage-switching (ZVS) control strategy with a minimum root mean square (rms) value of inductor current is proposed in this letter for the four-switch buck-boost (FSBB) dc-dc converter that is used as a 48 V intermediate bus pre-regulator in distributed power systems. The quadrilateral inductor current modulation is adopted to achieve ZVS operation. The four control time intervals are optimally selected such that the inductor current rms value is minimized, thus reducing the conduction loss. The proposed closed-loop ZVS control scheme can be implemented without sensing the load current, although the rms minimum current algorithm needs the input and output voltages and load current at given a steady-state condition. The control scheme is verified in a 300 W dc-dc prototype of the ZVS FSBB converter. The input voltage and load transition tests are provided to verify the closed-loop characteristics without sensing load current.

A capacitor voltage balancing method for a modular multilevel dc (MMDC) converter is proposed. The MMDC inherits the desirable features of both a modular multilevel converter (MMC) and a dual active bridge, namely high voltage capability, fault tolerance, zero-voltage switching-on of all the power devices, and a wide operating range. These features are ideal for a dc transformer in any dc distribution system. One key MMDC control issue is balancing of submodule capacitor voltages. Conventional MMC balancing techniques cannot be used as arm currents of an MMDC change direction within each switching cycle. This paper establishes that the average capacitor voltage of each arm is self-balanced and proposes a method to balance voltages within an arm by assigning the gate signals with higher charge difference to the submodules with lower voltages and vice versa. Charge difference is obtained by the voltage difference, hence only the SM capacitor voltages are required for balancing control. Different from the existed methods, the proposed technique is not limited by voltage gain or load conditions. Simulation and experimental results show that capacitor voltages are balanced under different voltage gains, different output power, and also when the MMDC starts up, hence ensuring the stable MMDC operation.

In this article, the four-switch buck–boost (FSBB) converter is a preferred choice for the dc–dc applications where the step-up and step-down are needed. In order to reduce the inductor size and improve the efficiency, the zero-voltage switch (ZVS) control schemes with four segments inductor current for FSBB have been investigated in numerous publications. Among these ZVS control schemes, the optimized control variable stored as the huge look-up table data achieved minimum root-mean-square (RMS) inductor current, and the complex real-time calculation is avoided. However, for the purpose of matching the wide input and output voltage ranges, an external flash is needed for storing the look-up table data; And the large time consumption for invoking the data hazard the dynamic performance significantly. To reduce the storage device cost and meet the demand of transient, a simplified real-time control algorithm is proposed by dividing the operation into the defined Discontinuous Conduction Mode (DCM) and Continuous Conduction Mode (CCM) operation featuring the minimum RMS inductor current and ZVS operation during the whole voltage range without complex calculation and mode transient. Finally, a 300 W dc–dc prototype is built to verify the theoretical analysis and proposed control scheme with a low-cost real-time digital controller.

The recent emergence of free-standing GaN substrate has enabled the development of vertical GaN-on-GaN power devices. This letter presents the dynamic ON-resistance (RON) and reverse recovery performance of a novel vertical GaN-on-GaN Schottky barrier diode (SBD) characterized by a double pulse tester. The vertical GaN-on-GaN SBD exhibits fast reverse recovery with a low RON·Qrr figure-of-merit. For the first time, the current-collapse-free performance (i.e., no dynamic RON degradation) has been experimentally verified in a vertical GaN power rectifier under different switching conditions including: OFF-state stress bias up to 500 V, OFF-state stress time within 10 ^-6 -10 ² s, high temperature up to 150 °C, and different load current levels.

Silicon carbide (SiC) devices enable more compact and efficient design of applications such as traction inverters and rectifiers. With miniaturization of power electronics, volume and weight of heatsink or cold plate occupies a significant portion. So, thermal design, especially power loss evaluation, is crucial to the whole system. Analytical switching model based on datasheet parameters is usually adopted to evaluate devices' switching loss due to its convenience. However, when applied on SiC metal-oxide-semiconductor field-effect-transistors (MOSFETs), turn-on waveforms of conventional analytical switching model show obvious discrepancy from experiments at both current rising and voltage falling stages. The transfer and capacitance characteristics from datasheet are responsible for that. Due to short channel effect and drain-induced barrier lowering, transfer characteristic during turn on period varies with different drain-to-source voltage vds. Cgd during actual turn on period is also different from that on the datasheet. So, considering the actual turn on process, dynamic transfer characteristic and Qgd are proposed and measured in this paper. After these modifications, switching-on waveforms of the analytical switching loss model match the experiments very well, and error of the estimated loss is less than 5%.